计算机组成与体系结构A卷.docx

计算机组成与体系结构A卷.docx

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计算机组成与体系结构A卷

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华南理工大学期末考试

《计算机组成与体系结构》试卷A

注意事项：

1.考前请将密封线内填写清楚；

2.所有答案请直接答在试卷上；

3．考试形式：

闭卷；

4.本试卷共三大题，满分100分，考试时间120分钟。

题号

一

二

三

四

五

总分

得分

评卷人

I.单选题（2pointseach）

Foreachquestioninthissection,choose1answer.Choosethebestanswer.

1.Whichoneofthesewillcauseoverflowinsignedaddition?

.

A.Ifthereisacarryoutoftheleastsignificantbit.

B.Ifthereisacarryoutofthemostsignificantbit.

C.Ifaddingtwonegativenumbersresultsinapositiveresult.

D.Ifthemagnitudeoftheresultissmallerthanthemagnitudeofthesmalleradded.

2.Amajoradvantageofdirectmappingofcacheisitssimplicity.Themaindisadvantageofthisorganizationisthat.

A.Itdoesnotallowsimultaneousaccesstotheintendeddataanditstag.

B.Itsmoreexpensivethanmoreothertypesofcacheorganizations.

C.Thecachehitratioisdegradediftwoormoreblocksusedalternatelymapontothesameblockframeinthecache.

D.Itsaccesstimeisgreaterthanthatofothercacheorganizations.

3.Inaninterruptprocess,theusageofsavingPCis.

A.tomakeCPUfindtheentryaddressoftheinterruptserviceroutine

B.tocontinuefromtheprogrambreakpointwhenreturningfrominterrupt

C.tomakeCPUandperipheralsworkinginparallel

D.toenableinterruptnesting

4.Whatistheeffectofthefollowinginstruction?

.

moveecx,[ebp+8]

A.Add8tothecontentsofebpandstorethesuminecx.

B.Add8tothecontentsofebp,treatthesumasamemoryaddressandstorethecontentsatthataddressinecx.

C.Add8tothecontentsofthememorylocationwhoseaddressisstoredinebpandstorethesuminecx.

D.Addthecontentsofebptothecontentsofmemoryaddress8andstorethesuminecx.

5.Thepartofmachinelevelinstruction,whichtellsthecentralprocessorwhatwastobeDoneis.

A.operationcodeB.addressC.operandD.noneoftheabove

6.Inacachememorysystem,forawriteoperation,ifthecachelocationandthemainmemorylocationareupdatedsimultaneously,thenitusestechnique.

A.write-backB.write-outC.write-allocationD.write-through

7.istheprocessbywhichthenextdevicetobecomethebusmasterisselectedandbusmastershipistransferredtoit.

A.BusphaseB.BusarbitrationC.BustimingD.Bustransceiver

8.Whichoneofthefollowingaboutbenefitsofvirtualmemoryisnottrue?

.

A.providelargeaddressspaceB.relieveprogrammersfromburdenofoverlays

C.resolveinternalfragmentationD.simplifyrelocation

9.Aharddiskwith5plattershas2048tracks/platter,1024sectors/track（fixednumberofsectorspertrack）,and512bytesectors.Whatisitstotalcapacity?

.

A.5GBB.10GBC.15GBD.20GB

10.TranslatetheIEEEsingle-precisionfloatingpointnumbersshownbelowtotheirdecimalequivalent..

A.+832B.-832C.+416D.-416

11.Inmicroprogram-controlledmachines,therelationshipbetweenthemachineinstructionandthemicroinstructionis.

A.amachineinstructionisexecutedbyamicroinstruction

B.amicroinstrucitoniscomposedofseveralmachineinstructions

C.amachineinstructionisinterpretedbyamicroroutinecomposedofmicroinstructions

D.amicroroutineisexecutedbyamachineinstruction

12.Inthefollowingstatements,isnottrue.

A.Branchinstructionscancausedelaysinpipelinedprocessors,becausetheprocessorcannotdeterminewhichinstructiontofetchnextuntilthebranchhasexecuted.

B.Structuralhazardsoccurwhentheprocessor’shardwareisnotcapableofexecutingalltheinstructionsinthepipelinesimultaneously.

C.Pipeliningincreasesprocessorperformancebydecreasingtheexecutiontimeofaninstruction.

D.Datahazardsoccurwhenthepipelinechangestheorderofread/writeaccessestooperandssothattheorderdiffersfromtheorderseenbysequentiallyexecutinginstructionsontheunpipelinedmachine.

13.InterruptsgeneratedbythekeyboardwillinterrupttheCPU.

A.onlywhentheCPUisexecutingabusy-loop.

B.onlywhentheCPUisnotdoinganyusefulwork.

C.aftertheCPUhasturnedontheinterrupt-enableflag.

D.whentheCPUisexecutingtime-criticalwork.

14.Inacomputerwithamicroprogrammablecontrolunittheperiodoftheclockisdeterminedby.

A.thedelayofthecontrolmemory.

B.thedelayofthemainmemory.

C.thedelayoftheALU.

D.thesumoftwooftheabovedelays.

15.Ifthe2010versionofacomputerexecutesaprogramin200sandtheversionofthecomputermadeintheyear2011executesthesameprogramin120s,thenthespeedupthatthemanufacturerhasachievedoverthetwo-yearperiodis.

A.1.44B.1.78C.1.53D.1.67

II.简答题（5pointseach）

1.WhatisthedifferencebetweentheDMAandinterrupt-drivenmethods？

（fromtwowaystoanalyze:

（1）WhattimeshouldCPUresponseDMArequestorinterruptrequest?

（2）WhichworkshouldCPUneedtodowhenitacknowledgesDMArequestorinterruptrequest?

）

Solution:

2.Aset-associativecacheconsistsofatotal32blocksdividedinto4-blocksets.Themainmemorycontains1024blocks,eachconsistingof64words.

（1）Howmanybitsarethereinamainmemoryaddress?

（2）HowmanybitsarethereineachoftheTAG,SET,andWORDfields?

Solution:

3.ThetwounsignedbinarynumbersshownbelowaretobemultipliedusingamultiplierthatusesBooth’sAlgorithm:

10011010

X01110111

（1）Howmanybitswillbeneededtostoretheproductofthesetwonumbers?

（2）HowmanyadditionsandsubtractionswillbeperformedbytheBooth’s

Algorithmmultiplierrespectively?

Solution:

4.Whataretheadvantagesanddisadvantagesofhardwiredandmicroprogrammedcontrol?

Solution:

III.综合题（10pointseach）

1.Assumethatacomputer’sinstructionlengthis16-bit,anditsoperandaddressis6-bit.Supposethedesignersneedtwo-addressinstructions,one-addressinstructionsandzero-addressinstructions.Howshouldwedesigntheinstructionformat?

Andspecifythenumbersofeachtypeofinstructioncanbedesigned.

Solution:

2.Considerthatfloating-pointnumbersarerepresentedina12-bitformat.Thescalefactorhasanimpliedbaseof2anda5-bit,excess-15exponent,withthetwoendvalueof0and31usedtosignifyexact0andinfinity,respectively.The6-bitmantissaisnormalizedasintheIEEEformat,withanimplied1totheleftofthebinarypoint.

（1）Representthenumbers-0.6875and+19inthisformat.

（2）PerformSubOperationontheoperandsA=010001011011,B=101111101010.（Note:

Usingroundingasthetruncationmethodintheanswers.Writethecomputationprocess!

）

Solution:

3.Alogiccircuitisneededtoimplementtheprioritynetworkshownlikefigurebelow.Thenetworkhandlesthreeinterruptrequestlines.WhenarequestisreceivedonlineINTRi,thenetworkgeneratesanacknowledgementonlineINTAi.Ifmorethanonerequestisreceived,onlythehighest-priorityrequestisacknowledged,wheretheorderingofpriorityis:

priorityofINTR1>priorityofINTR2>priorityofINTR3.

（1）GiveatruthtableforeachoftheoutputsINTA1,INTA2,andINTA3.

（2）GivelogicexpressionsofINTA1,INTA2,INTA3andalogiccircuitforimplementingthisprioritynetwork.

Solution:

4.Thefollowingfiguregivespartofthemicroinstructionsequencecorrespondingtooneofthemachineinstructionsofamicroprogrammedcomputer.MicroinstructionBisfollowedbyC,D,F,orI,dependingonbitsIR6,IR5andIR4ofthemachineinstructionregister.

Givethepossibleimplementation.Microinstructionsequencingisaccomplishedbymeansofamicroprogramcounter.Branchingisachievedbymicroinstructionsoftheform:

BranchtoX,ORWhereXisabasebranchaddress.Thebranchaddressismodifiedbybit-ORingofbitsIR4,IR5andIR6withtheappropriatebitswithX.

Solution:

5.Considerthefollowingpieceofcode:

inti;

intA[1024*1024];

intx=0;

for（i=0;i<1024;i++）{

x+=A[i]+A[1024*i];

}

Supposethatitisexecutedonasystemwitha2-waysetassociative16KBdatacachewith32-byteblocks,32-bitwords,andanLRUreplacementpolicy.Assumethatintisword-sized.Alsoassumethattheaddressofais0x0,thatiandxareinregisters,andthatthecacheisinitiallyempty.Howmanydatacachemissesarethere?

Howmanyhitsarethere?

Solution: