M12153DHA.docx

M12153DHA.docx

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M12153DHA

MonitorDevelopment

Display&DevelopmentDivision

IMESCo.,Ltd.

TFTColorLCDModuleM121-53DHAProductSpecifications

30.8cm（12.1inch）SVGA（800x600）

JUL31,2001

Rev.&date

Contentofchange

Rev.1.0

SEP04,2000

InitialRelease

Rev.2.0

APR27,2001

PDFfile

Rev.3.0

JUL31,2001

ECcorrection

PreparedbyE.Hiratsuka

　ApprovedbyM.Ozawa

Scope

M121-53DHisaTFTLCDcolormoduletobedesignedtorealizethelargestscreenonA4sizenotebookstylepersonalcomputer,PCmonitorandindustryapplication.Inadditiontoitslargescreen,thecharacteristicsofthismodulearehighluminance,lightweight,slim/thinoutline,lowpowerconsumptionandhighresolutionofSVGA（800x600）capability.

FeaturesApplication

.30.8cm（12.1inch）diagonal.NotebookPCs

.Native262kcolors（R/G/B6biteach）.Monitors

.SVGA800x600pixels

.LowReflection（BlackMatrix）

.Twolampsbacklight

.250cd/m2highluminance

.278mmx205mmx12mmtyp.

（Needmin.3mmclearancefromlampcables）

.465gtyp..7.85Wtyp.

Notes

.TheconstructionofM121-53DHistoaddaTTLRGBtoLVDSconversioncard（SN75LVDS84A）to

M121-53DR（LVDSinput）TFTLCDModule.Therefore,theinputofM121-53DHiscompatibleto

M121-53HR.

Thismoduledoesnotcontainaninvertercardforbacklight.

TheLCDcellissuppliedfromIBM.

1.CharacteristicsSummary

ScreenDiagonal

30.8cm（12.1"）

ActiveArea

246.0mm（H）x184.5mm（V）

PixelFormat

800（x3）x600

PixelPitch

0.3075（peronetriad）x0.3075

PixelArrangement

R,G,BVerticalStripe

DisplayMode

NormallyWhite

WhiteLuminance

250cd/m2typ.

（CFLDischargeCurrent=5.0mArmsx2）

ContrastRatio

150:

1typ.

ViewingAngle[Degrees]

Horizontal（Right）40min

K>=10（Left）40min

K:

ContrastRatio

Vertical（Upper）10min

K>=10（Lower）20min

OpticalRiseTime/FallTime

30msectyp.

NominalInputVoltageVDD

+3.3V

PowerConsumption（w/oinverter）

（VDDline+twolampsinputline）

7.85Wtyp.

Weight

465gramstyp.

PhysicalSize

278mmx205mmx12mmtyp.

（Needmin3mmclearancefromlampcables.

ElectricalInterface

DigitalVideoSignals

（6-bitforeachCorlorG/B）

Sync.Signal（x4）

Supportedcolors

Native262kcolors

ScreenCriteria

DOTdefect:

LIT:

6

UNLIT:

-

TotalDOTDefect:

15

DoubleLIT:

2

DoubleUNLIT:

-

DistanceLIT:

3,20mm

LineDefect:

NolineDefect

Backlightlamplife

（Luminancebecomeshalfvalueofinitialvalue.）

30,000Hoursunderfollowingcondition.

-Temp=25degC

-Continuespoweron

TemperatureRange

Operating

Storage

+0to+50degC

-20to+60degC

2.AbsoluteMaximumRatings

ElectricalAbsoluteMaximumRatings

Rating

Symbol

Value

Unit

Conditions

SupplyVoltage

VDD

-0.3to+4.0

V

Lampignitionltage

Vcfl

1500

Vrms

At0degreeC

CFLDischargeCrrent

Icfl

5.5

mArms

Excludeinrushcurrent

CFLInrushCurrent

Ircfl

30

mA0-p

WithMax.duration=50（mSec）

CFLDrivingequency

fcfl

30to70

kHz

At25degreeC

StaticElectricity

OperatorsshouldbegroundedinhandlingtheTFTLCDModule

EnvironmentalAbsoluteMaximumRatings

Rating

Symbol

Value

Unit

Conditions

StorageTemperature

TST

-20to+60

degC

Attheglasssurface

OperationTemperature

TOP

0to+50

degC

Attheglasssurface

OperationHumidity

8to95

%RH

Maxwetbulbtemp.29degC

Nocondensation

Vibration

1.5

G

10-200Hz,X,Y,Z（Note1）

TrapezoidalShock

50

G

18msec,+/-X,Y,Z（Note1）

CorrosiveGas

NotAcceptable

Note1:

AttestingVibrationandShock,thefixtureinholdingtheModuletobetestedhavetobehardrigid

enoughsothattheModulewouldnotbetwistedorbentbythefixture.

3.ColorArrangement

800TH

TRIAD

....................

RGB

RGB

RGB

RGB

RGB

RGB

1ST

LINE

....................

....................

..

..

..

..

..

..

..

..

..

..

..

..

..

..

....................

RGB

RGB

RGB

RGB

....................

600TH

LINE

4.BlockDiagram

LCD-DRIVE

Connector（41pin）Y-DriverBacklightUnit

TFTARRAY/CELL

800（R/G/B）x600

LCDDRIVECARD

6bitcolordata

forR/G/B

LCD

Controller

DTCLK

DSPTMG

DC-DC

Converter

Hsync

Vsync

VDD

X-Driver

GND

Lamp

Connector

（3pin）

5.SignalInterface

5.1Connectors

Physicalinterfaceisdescribedasfortheconnectoronmodule.

Theseconnectorsarecapableofaccommodatingthefollowingsignalsandwillbefollowingcomponents.

SupplierName

Supplier’sPartNumber

LCDDriveConnector

HIROSE

DF9B-41P-1V

MatingConnector

HIROSE

DF9B-41S-1V

SupplierName

Supplier’sPartnumber

LampConnector

JST

BHR-04VS-1

SBH-001T-P0.5

Matingconnector

JST

SM04（4.0）B-BHS-1-TB

5.2SignalforLCDDriveConnector

Pin#

SignalName

Pin#

Signalname

1

GND

2

-DTCLK

3

GND

4

HSYNC

5

VSYNC

6

GND

7

GND

8

GND

9

+RED0

10

+RED1

11

+RED2

12

GND

13

+RED3

14

+RED4

15

+RED5

16

GND

17

GND

18

GND

19

+GREEN0

20

+GREEN1

21

+GREEN2

22

GND

23

+GREEN3

24

+GREEN4

25

+GREEN5

26

GND

27

GND

28

GND

29

+BLUE0

30

+BLUE1

31

+BLUE2

32

GND

33

+BLUE3

34

+BLUE4

35

+BLUE5

36

GND

37

+DSPTMG

38

Reserved

39

VDD（+3.3V）

40

VDD（+3.3V）

41

Reserved

Note1:

‘Reserved’pinsarenotallowedtoconnectanyotherline.

Note2:

VoltagelevelsofallinputsignalsareCMOScompatible（exceptVDD）.

Thismoduleshallcontaincolumnarerowdriverstoaddressanygivenpixel.ThehostattachedPCsystem

shallsupply18bits（6bitspereachcolor）dataand4-syncsignalstothesedriversandpowersupplyfor

backlight.Theseinterfacesignalsandtheirtimingrelationshiparedescribedbelow.

PinNo.

SignalName

Description

15

14

13

11

10

9

+RED5

+RED4

+RED3

+RED2

+RED1

+RED0

RedData5（MSB）

RedData4

RedData3

RedData2

RedData1

RedData0（LSB）

Red-Pixel-Data:

Eachredpixel’sbrightnessdataconsistsof

these6bitspixeldata.

25

24

23

21

20

19

+GREEN5

+GREEN4

+GREEN3

+GREEN2

+GREEN1

+GREEN0

GreenData5（MSB）

GreenData4

GreenData3

GreenData2

GreenData1

GreenData0（LSB）

Green-Pixel-Data:

EachGreenpixel’sbrightnessdataconsists

ofthese6bitspixeldata.

35

34

33

31

30

29

+BLUE5

+BLUE4

+BLUE3

+BLUE2

+BLUE1

+BLUE0

BlueData5（MSB）

BlueData4

BlueData3

BlueData2

BlueData1

BlueData0（LSB）

Blue-Pixel-Data:

EachBluepixel’sbrightnessdataconsists

ofthese6bitspixeldata.

2

-DTCLK

DataClock:

Thetypicalfrequencyis40.00MHz.

Thesignalisusedtostrobethepixeldata

and+DSPTMGsignals.Allpixeldatashall

bevalidatthefallingedgewhenthe

+DSPTMGsignalishigh.

37

+DSPTMG

DisplayTiming:

Thissignalstrobedatfallingedgeof

–DTCLK.Whenthesignalishigh,the

pixeldatashallbevalidtobedisplayed.

5

VSYNC

VerticalSync:

Thesignalissynchronizedto–DTCLK.

4

HSYNC

HorizontalSync:

Thesignalissynchronizedto–DTCLK.

39,40

VDD

+3.3V

1,3,6,7,8,12,

16,17,18,22,

26,27,28,32,36

GND

SignalGround

38,41

Reserved:

Noconnection（Signalreserved）

Note:

OutputsignalsfromsystemshallbeloworHi-ZstatewhenVDDisoff.

5.3SignalSpecification

VoltagelevelsofallinputsignalsareCMOScompatible（exceptVDD）.Eachsignal

characteristicsareasfollows;

Parameter

Condition

Min.

Max.

Unit

Vih

Highlevelinputvoltage

R/G/B,DTCLK

DSPTMG,H/VSYNC

0.7xVDD

VDD

V

Vil

Lowlevelinputvoltage

R/G/B,DTCLK

DSPTMG,H/VSYNC

0

0.2xVDD

V

Iih

Highlevelinputcurrent

R/G/B,DTCLK

DSPTMG,H/VSYNC

-

50

uA

Iil

Lowlevelinputcurrent

R/G/B,DTCLK

DSPTMG,H/VSYNC

-

-50

uA

5.4SignalforLampConnector

PinNo.

SignalName

Description

1

Lamphigh1

ForLamp1

2

LampHigh2

ForLamp2

4

LampLow

ForLamp1&2

6.LampInterfaceSpecificationandGuideLineforCFLInverter

ParameterName

Symbol

Min.

Typ.

Max.

Unit

Note

CFLKick-offVoltage

Vs

-

-

1,100

Vrms

Tamb=25degC*4

-

-

1,500

Tamb=0degC*4

CFLDischargeCurrent

（peronelamp）

Icfl

1.5*6

-

5.5

mArms

Totaloperatingrange

-

5.0

-

Screen250cd/m2,

atTamb=25degC

CFLDischargeVoltage

Vcfl

-

650

-

Vrms

Screen250cd/m2,

atTamb=25degC

CFLPowerConsumption

Pcfl

-

6.5

-

W

Screen250cd/m2,

atTamb=25degC

CFLDischargeFrequency

Fcfl

30

40

70*6

kHz

Reference*5

Note

*1AllofcharacteristicslistedaremeasuredundertheconditionusingtheIMESinverter（IMESP/N

6M000704）.

*2Incaseofusinganinverterotherthanlisted,itisrecommendedtochecktheinvertercarefully.

Sometimes,interferingnoisestripesappearonthescreen,andsubstandardluminanceorflickeratlow

powermayhappen.

*3Indesigninganinverter,itissuggestedtochecksafetycircuitverycarefully.ImpedanceofCFL,for

instance,becomesmorethan1[Mohm]whenCFLisdamaged.

*4Generally,CFLhassomeamountofdelaytimeafterapplyingkick-offvoltage.Itisrecommendedto

keeponapplyingkick-offvoltagefor1[Sec]untildischarge.

*5CFLdischargefrequencymustbecarefullychosensoasnottoproduceinterferingnoisestripesonthe

screen.

*6ReducingCFLcurrentincreasesCFLdischargevoltageandgenerallyincreasesCFLdischarge

frequency.Soalltheparametersofaninvertershouldbecarefullydesignedsoasnottoproducetoo

muchleakagecurrentfromhigh-voltageoutputoftheinverter.

7.InterfaceTimings

Basically,interface