lab04.docx
《lab04.docx》由会员分享,可在线阅读,更多相关《lab04.docx(14页珍藏版)》请在冰豆网上搜索。
lab04
Lab4:
LookingUndertheHood
TargetingXUPSpartan-3E
LookingUndertheHood
Introduction
Inthislab,youwillgaininsightintothecostsofvarioussystemabstractions,suchassaturationarithmetic,rounding,andadditionallatency.ThislabmakesuseoftheXilinxSystemGenerator’sresourceEstimatorblocktoestimatethehardwareresourcesusageineachabstractionscaseandViewRTLSchematicvieweravailableinXSTtoviewthefunctionaldesign.
Note:
Therearecompletedexamplesinc:
\xup\dsp_flow\labs\lab4\lab4_soln.
Objectives
Aftercompletingthislab,youwillbeableto:
∙Understandtheeffectofquantizationandoverflowparameters
∙Understandtheimplicationsofsaturationarithmeticandrounding
∙UsetheResourceEstimatorblocktoestimatetheresourceutilization
∙ViewtheresultsofyourdecisionsinanRTLviewer
DesignDescription
Thedesignisasimpleaddsubblockforwhichyouwillmodifysystemparametersontheaddsub(xladdsub)blockandobservetheeffectonthegeneratedhardware.
Figure4-1.SystemGeneratoraddsubDesignforHardwareComparison
Procedure
Thislabcomprisessixprimarysteps.YouwillusetheprovideddesigninSimulinkandestimatetheresourcesusingtheResourceEstimatorblockinStep1.UsingtheSystemGeneratorblock,youwillgeneratethedesigninStep2.InStep3,thedesignisimplementedandthepost-mapreportisutilizedtoestimatetheresources.Thisstepillustratesdifferentwaystodeterminetheresourceutilization.Steps4through6requireyoutochangetheoverflowandquantizationcharacteristics,implementthedesign,andunderstandtheimplicationinhardwareusingtheXSTViewRTLSchematicviewerofXilinxISE6.Beloweachgeneralinstructionforagivenprocedure,youwillfindaccompanyingstep-by-stepdirectionsandillustratedfiguresprovidingmoredetailforperformingthegeneralinstruction.Ifyoufeelconfidentaboutaspecificinstruction,feelfreetoskipthestep-by-stepdirectionsandmoveontothenextgeneralinstructionintheprocedure.
Note:
Ifyouareunabletocompletethelabatthistime,youcandownloadthelabfilesforthismodulefromtheXilinxUniversityProgramsiteat
EstimateResourcesUsingResourceEstimatorStep1
GeneralFlowforthisLab:
Step4:
ModifyOverflow
Step3:
ImplementDesign
Step2:
GeneratetheDesign
Step1:
EstimateResources
Step5:
ModifyQuantization
Step6:
ModifyQuantizationandOvervlow
Opentheaddsub.mdlmodelinMATLABandaddtheResourceEstimatorblockfromXilinxBlocksetIndex.Double-clicktheaddsubblockandclicktheUsePlacementInformationforCorecheckbox.Double-clicktheresourceEstimatorblockandclicktheEstimateAreabutton
❶OpentheMATLABcommandwindowbydouble-clickingtheMATLABicononyourdesktop,orgotoStartMenuProgramsMATLAB7.0MATLAB7.0
❷Changedirectorytoc:
/xup/dsp_flow/labs/lab4/:
Typecdc:
/xup/dsp_flow/labs/lab4/inthecommandwindow
❸Opentheaddsub.mdl
Note:
Theaddsub.mdldesignhastruncateforthequantizationandwrapforoverflow
❹Double-clicktheAddSubblocktoopentheparametersblock
❺MakesuretheUsecoreplacementinformationcheckboxisUnchecked
Figure4-2.TheAddSubblockParameters.
❻Double-clicktheResourceEstimatorblock
❼SelectEstimatefromthedrop-downboxandclicktheEstimatebutton
Figure16-3.EstimateResourcesUsingtheEstimateAreaButton.
1.Whatistheresourceutilizationestimate?
NumberofSlices:
NumberofLUTs:
NumberofIOBs:
GeneratetheDesign“AsIs”togetaBaselineStep2
GeneralFlowforthisLab:
Step4:
ModifyOverflow
Step3:
ImplementDesign
Step2:
GeneratetheDesign
Step1:
EstimateResources
Step5:
ModifyQuantization
Step6:
ModifyQuantizationandOvervlow
UsingtheSystemGeneratorblock,generatethebaselinedesignwiththefollowingsettings
∙Compilation:
HDLNetlist
∙ProductFamily:
Spartan-3Exc3s500e-4fg320
∙TargetDirectory:
/run1
∙SynthesisTool:
XST
❶Double-clicktheSystemGeneratorblock
❷Browsetothecurrentdirectory(c:
/xup/dsp_flow/labs/lab4/)astheTargetDirectory
❸SetthedevicerelatedfieldsaslistedbelowandclicktheGeneratebutton
∙Compilation:
HDLNetlist
∙ProductFamily:
Spartan3exc3s500e-4fg320
∙TargetDirectory:
/run1
∙SynthesisTool:
XST
ViewRTLSchematicandEstimateResourcesStep3
GeneralFlowforthisLab:
Step4:
ModifyOverflow
Step3:
ImplementDesign
Step2:
GeneratetheDesign
Step1:
EstimateResources
Step5:
ModifyQuantization
Step6:
ModifyQuantizationandOvervlow
Opentheaddsub_cw.iseprojectintheXilinxISE8environment.Synthesizeandimplementthedesignusingthedefaultsettings.ViewthesynthesizeddesignusingtheXSTViewRTLSchematicviewer.
❶Opentheaddsub_cw.iseprojectinXilinxISE8fromc:
\xup\dsp_flow\labs\lab4\run1
❷Selectaddsub_cw.vhdintheSourcesinProjectwindow
❸Double-clickViewRTLSchematicunderSynthesis
❹Highlightthetop-levelblockandclickthePushbuttoninthetopmenutopushdownintothehierarchytoviewaddsub_x_0
❺Reviewtheschematicandclosetheviewer
FromSimulinkwindow,estimatetheresourcesusingpost-mapreportoftheimplementeddesign
❶Double-clicktheResourceEstimatorblockintheSimulinkdesignwindow
❷SelectthePost-MapandclicktheEstimatebutton,whichwillrunimplementationinthebackground
❸Theresourcesarecomputedusingthepost-mapreport
2.Whatisthepost-mapresourceutilizationestimate?
NumberofSlices:
NumberofLUTs:
ModifytheOverflowCharacteristicStep4
GeneralFlowforthisLab:
Step4:
ModifyOverflow
Step3:
ImplementDesign
Step2:
GeneratetheDesign
Step1:
EstimateResources
Step5:
ModifyQuantization
Step6:
ModifyQuantizationandOvervlow
Changetheaddsubblockparameter’soverflowpropertiestoSaturationarithmetic.GeneratetheVHDLcodeandimplementthedesign.ViewthesynthesizeddesignusingtheXSTViewRTLSchematicviewer,anddeterminetheresourcesusingPost-Mapreport.
❶Double-clicktheaddsubblockintheSystemGeneratormodel
❷IntheOutputTypetab,selectSaturateforOverflow,andthensimulate
❸Changethetargetdirectorytorun2andregeneratethedesign
❹Openaddsub_cw.iseinrun2andselectaddsub_cw.vhdintheSourcesinProjectwindowintheXilinxISE8
❺OpendownSynthesizeintheProcessesforCurrentSourceanddouble-clickViewRTLSchematic
❻Understandtheschematicandclosetheviewer
3.WhatdoyouobserveintheRTLview?
❼Usepost-mapreporttoestimatetheresources
4.Whatisthepost-mapresourceutilizationestimate?
NumberofSlices:
NumberofLUTs:
❽Closetheproject
ModifytheQuantizationCharacteristicStep5
GeneralFlowforthisLab:
Step4:
ModifyOverflow
Step3:
ImplementDesign
Step2:
GeneratetheDesign
Step1:
EstimateResources
Step5:
ModifyQuantization
Step6:
ModifyQuantizationandOvervlow
Changebacktheaddsubblockparameter’sOverflowpropertiestoWrapandselecttheQuantizationtoRounding.GeneratetheVHDLcodeandimplementthedesign.ViewthesynthesizeddesignusingtheXSTViewRTLSchematicviewer.
❶Double-clicktheaddsubblockintheSystemGeneratormodel
❷IntheOutputTypetab,setOverflowtoWrapandQuantizationtoRound,andthensimulate.
❸Changethetargetdirectorytorun3andregeneratethedesign:
ClickGenerate
❹Opentheaddsub_clk_wrapper.iseprojectintheXilinxISE8
❺Selectaddsub_clk_wrapper.vhdintheSourcesinProjectwindow
❻OpendownSynthesizeintheProcessesforCurrentSourceandclicktheViewRTLSchematic
❼Understandtheschematicandclosetheviewer
5.WhatdoyouobserveintheRTLview?
❾UsetheResourceEstimatortogeneratethepost-maparea
6.Whatisthepost-mapresourceutilization?
NumberofSlices:
❿Closetheproject
ModifytheQuantizationandOverflowCharacteristicsStep6
GeneralFlowforthisLab:
Step4:
ModifyOverflow
Step3:
ImplementDesign
Step2:
GeneratetheDesign
Step1:
EstimateResources
Step6:
ModifyQuantizationandOvervlow
Step5:
ModifyQuantization
Changetheaddsubblockparameter’sOverflowpropertiestoSaturationandQuantizationtoRounding.GeneratetheVHDLcodeandimplementthedesign.ViewthesynthesizeddesignusingtheXSTViewRTLSchematicviewer.
❶Double-clicktheaddsubblockintheSystemGeneratormodel
❷IntheOutputTypetab,selectSaturateforOverflowandRoundforQuantization
❸Changethetargetdirectorytorun4Regeneratethedesign
❹Opentheaddsub_cw.iseprojectintheXilinxISE8
❺Selectaddsub_cw.vhdintheSourcesinProjectwindow
❻OpendownSynthesizeintheProcessesforCurrentSourceandclickViewRTLSchematic
❼Understandtheschematicandclosetheviewer
7.WhatdoyouobserveintheRTLview?
❽DeterminetheresourceutilizationwiththeResourceEstimator
8.Whatisthepost-mapresourceutilization?
NumberofSlices:
❾Closetheproject
Conclusion
Inthislab,youlearnedwhatquantizationandoverflowparametersdo.YouwereabletoestimatetheresourceutilizationusingtheResourceEstimatorblock.Youalsoobservedtheimplicationsofsaturationarithmeticandroundinginthehardware.Additionally,youwerefamiliarizedwiththeXSTViewRTLSchematicViewer.
Answers
1.Whatistheresourceutilizationestimate?
NumberofSlices:
5
NumberofLUTs:
10
NumberofIOBs:
29
TheRTLviewofthebaselinedesignshowsthatnoadditionalhardwareisrequiredonthe