数字钟实验代码.docx
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数字钟实验代码
数字钟实验代码
电信0902张超u200913639
modulecounter24
(
inputwirecp,
inputwirencr,
inputwireen,
outputreg[3:
0]cnth,
outputreg[3:
0]cntl
);
always@(posedgecpornegedgencr)
begin
if(~ncr)
begin
{cnth,cntl}<=8'h00;//如果清零符号ncr为低电位,则清零
end
elseif(~en)
begin
{cnth,cntl}<={cnth,cntl};//如果en为低电位则开始计数
end
elseif((cnth>2)||(cntl>9)||((cnth==2)&&(cntl>=3)))
begin
{cnth,cntl}<=8'h00;//如果十位大于二,或各位大于九,或达到二十三则清零重新计数。
end
elseif((cnth==2)&&(cntl<3))
begin
cnth<=cnth;cntl<=cntl+1'b1;//十位等于二并且各位小于三时,则各位计数加一
end
elseif(cntl==9)
begin
cnth<=cnth+1'b1;cntl<=4'b0000;//另外,十位小于二,各位计数为九时,各位清零,十位进一位
end
else
begin
cnth<=cnth;cntl<=cntl+1'b1;//其他的情况则各位计数
end
end
endmodule
modulecounter10
(
inputwirecp,
inputwirencr,
inputwireen,
outputreg[3:
0]q
);
always@(posedgecpornegedgencr)
begin
if(~ncr)
begin
q<=4'b0000;//如果清零符号ncr为低电位,则清零
end
elseif(~en)
begin
q<=q;//如果en为低电位则保持
end
elseif(q==4'b1001)
begin
q<=4'b0000;
end
else
begin
q<=q+1'b1;
end
end
endmodule
modulecounter6
(
inputwirecp,
inputwirencr,
inputwireen,
outputreg[3:
0]q
);
always@(posedgecpornegedgencr)
begin
if(~ncr)
begin
q<=4'b0000;
end
elseif(~en)
begin
q<=q;
end
elseif(q==4'b0101)
begin
q<=4'b0000;
end
else
begin
q<=q+1'b1;
end
end
endmodule
moduletop_clock
(
inputwirecp,
inputwirencr,
inputwireen,
inputwireadj_min,
inputwireadj_hour,
outputwire[7:
0]hour,
outputwire[7:
0]minute,
outputwire[7:
0]second
);
supply1vcc;
wireminl_en;
wireminh_en;
wirehour_en;
counter10u1
(
.q(second[3:
0]),
.ncr(ncr),
.en(en),
.cp(cp)
);
counter6u2
(
.q(second[7:
4]),
.ncr(ncr),
.en(second[3:
0]==4'h9),
.cp(cp)
);
//秒的个位调用十进位,十位用六进制
assignminl_en=adj_min?
(second==8'h59):
vcc;
assignminh_en=(~adj_min&&(minute[3:
0]==4'h9))||(minute[3:
0]==4'h9)
&&(second==8'h59);
counter10u3
(
.q(minute[3:
0]),
.ncr(ncr),
.en(minl_en),
.cp(cp)
);
counter6u4
(
.q(minute[7:
4]),
.ncr(ncr),
.en(minh_en),
.cp(cp)
);
//分的个位用十进制,十位用六进制
assignhour_en=adj_hour?
((minute==8'h59)&&(second==8'h59)):
vcc;
counter24u5
(
.cnth(hour[7:
4]),
.cntl(hour[3:
0]),
.ncr(ncr),
.en(hour_en),
.cp(cp)
);
endmodule
modulefreq
(
inputwireclk50M,
inputwirerst,
outputregclk1Hz
);
parameterCNT_1HZ=50000000;
reg[31:
0]cnt;
always@(posedgeclk50Morposedgerst)
begin
if(rst)
begin
clk1Hz<=0;
cnt<=0;
end
else
begin
if(cnt>=CNT_1HZ-1)
begin
cnt<=0;
end
else
begin
cnt<=cnt+1;
end
if(cntbegin
clk1Hz<=0;//前一半计数为低电位
end
elseif(cntbegin
clk1Hz<=1;//后一半计数为高电位
end
end
end
endmodule
moduledisp
(
inputwireclk50M,
inputwire[3:
0]HexCode,
outputwire[7:
0]SegmentCode
);
reg[7:
0]Segment;
assignSegmentCode[7:
0]=~Segment[7:
0];
always@(posedgeclk50M)
begin
begin
case(HexCode)
4'h0:
begin
Segment<=8'h3F;
end
4'h1:
begin
Segment<=8'h06;
end
4'h2:
begin
Segment<=8'h5B;
end
4'h3:
begin
Segment<=8'h4F;
end
4'h4:
begin
Segment<=8'h66;
end
4'h5:
begin
Segment<=8'h6D;
end
4'h6:
begin
Segment<=8'h7D;
end
4'h7:
begin
Segment<=8'h07;
end
4'h8:
begin
Segment<=8'h7F;
end
4'h9:
begin
Segment<=8'h6F;
end
default:
begin
Segment<=8'h00;
end
endcase
end
end
endmodule
moduleradio
(
inputwire[7:
0]minute,
inputwire[7:
0]second,
outputregalarm_radio
);
always@(minuteorsecond)
begin
if(minute==8'h59)
begin
case(second)
8'h51,
8'h53,
8'h55,
8'h57,
8'h59:
alarm_radio=1'b1;
default:
alarm_radio=1'b0;
endcase//在51、53、55、57、59秒时LED灯各亮一次
end
elsealarm_radio=1'b0;
end
endmodule
modulebell
(
inputwirecp,
inputwiresethrkey,
inputwiresetminkey,
inputwirectrlbell,
inputwire[7:
0]hour,
inputwire[7:
0]minute,
inputwire[7:
0]second,
outputwirealarm_clock,
outputwire[7:
0]set_hr,set_min
);
supply1vdd;
wirehrh_equ;
wirehrl_equ;
wireminh_equ;
wireminl_equ;
wiretime_equ;
counter10su1
(
.q(set_min[3:
0]),
.ncr(vdd),
.en(setminkey),
.cp(cp)
);
counter6su2
(
.q(set_min[7:
4]),
.ncr(vdd),
.en(set_min[3:
0]==4'h9),
.cp(cp)
);
counter24su3
(
.cnth(set_hr[7:
4]),
.cntl(set_hr[3:
0]),
.ncr(vdd),
.en(sethrkey),
.cp(cp)
);
assignhrh_equ=(set_hr[7:
4]==hour[7:
4]);
assignhrl_equ=(set_hr[3:
0]==hour[3:
0]);
assignminh_equ=(set_min[7:
4]==minute[7:
4]);
assignminl_equ=(set_min[3:
0]==minute[3:
0]);
assigntime_equ=(hrh_equ&&hrl_equ&&minh_equ&&minl_equ);
assignalarm_clock=ctrlbell?
time_equ:
1'b0;
endmodule
modulecomplete_clock
(
inputwireclk50M,
inputwirencr,
inputwiremode,
inputwireoe,
inputwireen,
inputwireadj_min,
inputwireadj_hour,
inputwiresethrkey,
inputwiresetminkey,
inputwirectrlbell,
outputwire[7:
0]qa,
outputwire[7:
0]qb,
outputwire[7:
0]qc,
outputwire[7:
0]qd,
outputwirealarm
);
wire[7:
0]hour;
wire[7:
0]minute;
wire[7:
0]second;
wirecp;
wire[3:
0]da0;
wire[3:
0]da1;
wire[3:
0]da2;
wire[3:
0]da3;
wirealarm_radio;
wirealarm_clock;
wire[7:
0]set_hr;
wire[7:
0]set_min;
assignda0=mode?
set_min[3:
0]:
(oe?
minute[3:
0]:
second[3:
0]);
assignda1=mode?
set_min[7:
4]:
(oe?
minute[7:
4]:
second[7:
4]);
assignda2=mode?
set_hr[3:
0]:
(oe?
hour[3:
0]:
minute[3:
0]);
assignda3=mode?
set_hr[7:
4]:
(oe?
hour[7:
4]:
minute[7:
4]);
assignalarm=alarm_radio||alarm_clock;
top_clocktop1
(
.hour(hour),
.minute(minute),
.second(second),
.cp(cp),
.ncr(ncr),
.en(en),
.adj_min(adj_min),
.adj_hour(adj_hour)
);
dispdisp1
(
.clk50M(clk50M),
.HexCode(da3),
.SegmentCode(qa)
);
dispdisp2
(
.clk50M(clk50M),
.HexCode(da2),
.SegmentCode(qb)
);
dispdisp3
(
.clk50M(clk50M),
.HexCode(da1),
.SegmentCode(qc)
);
dispdisp4
(
.clk50M(clk50M),
.HexCode(da0),
.SegmentCode(qd)
);
freqfreq_INST
(
.clk50M(clk50M),
.rst(~ncr),
.clk1Hz(cp)
);
radiora1
(
.minute(minute),
.second(second),
.alarm_radio(alarm_radio)
);
bellbe1
(
.cp(cp),
.sethrkey(sethrkey),
.setminkey(setminkey),
.ctrlbell(ctrlbell),
.hour(hour),
.minute(minute),
.second(second),
.alarm_clock(alarm_clock),
.set_hr(set_hr),
.set_min(set_min)
);
endmodule