ComputerArchitectureQuestions.docx

ComputerArchitectureQuestions.docx

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ComputerArchitectureQuestions

Computerarchitecturequestions

Thesequestionswerecollectedfrompreviousexamsandtests,soyouwillfindanewsetofprocessorspecificationsinsertedatvariouslocations:

thequestionsfollowingusethoseprocessorspecifications.Youwillalsofindsomeessentiallyidenticalquestions!

“Re-use”isawell-establishedsoftwareengineeringprinciple:

weuseitforexamquestionstoo!

Exceptwhereotherwiseindicated,usethefollowingoperatingsystemandprocessorcharacteristicsinallquestions.

Youroperatingsystemuses8kbytepages.Themachineyouareusinghasa4-waysetassociative32kbyteunifiedL1cacheanda64entryfullyassociativeTLB.Cachelinescontain32bytes.Integerregistersare32bitswide.Physicaladdressesarealso32bits.Itsupportsvirtualaddressesof46bits.1Gbyteofmainmemoryisinstalled.

a）Giveoneadvantageofadirectmappedcache.

b）Whatisthemaindisadvantageofadirectmappedcache?

c）Howmanysetsdoesthecachecontain?

d）Howmanycomparatorsdoesthecacherequire?

e）Howmanybitsdothesecomparatorsworkon?

f）Yourprogramisatextprocessorforlargedocuments:

inaninitialcheck,itscansthedocumentlookingforillegalcharacters.Foran8Mbytedocument,whatwouldyouexpecttheL1cachehitratetobeduringtheinitialcheck?

（Youareexpectedtodoacalculationandgiveanapproximatenumericanswer!

）

g）Yourprogrammanipulateslargearraysofdata.Inordertoconsistentgoodperformance,youshouldavoidonething.Whatisit?

（Beprecise–anumericanswerrelevanttotheprocessordescribedaboveandanexplanationisrequiredhere.）

h）Whatisthealternativetoaunifiedcache?

Whatadvantagesdoesitprovide?

i）Inadditiontodataandtags,acachewillhaveadditionalbitsassociatedwitheachentry.Listthesebitsandaddashortphrasedescribingthepurposeofeachbit（orsetofbits）.（Inallcases,makeyouranswersconcise:

simplylistanydifferencesfromaprecedinganswer.）

（i）Aset-associativewrite-backcache

（ii）Aset-associativewrite-throughcache

（iii）Adirectmappedcache

（iv）Afullyassociativecache

j）32processesarecurrentlyrunning.IftheOSpermittedeachprocesstousethemaximumpossibleaddressspace,howmanypagetableentriesarerequired.

（i）Conventionalpagetables

（ii）Invertedpagetables

k）Drawadiagramshowinghowthebitsofavirtualaddressareusedtogeneratea32-bitphysicaladdress.

l）“Aprogramwhichsimplycopiesalargeblockofdatafromonememorylocationtoanotherexhibitslittlelocalityofreference,thereforeitsperformanceisnotimprovedbythepresenceofacache.”Commentonthisstatement.Isitstrictlytrue,mostlytrueornottrueatall?

Explainyouranswer.Assumeyouarerunningprogramsontheprocessordescribedatthebeginningofthissection.

m）Youareadvisingateamofprogrammerswritingalargescientificsimulationprogram.TheteammainlyconsistsofCSgraduateswhoskippedanystudyofcomputerarchitectureintheirdegrees.Performanceiscritical.

Listsomesimplethingsthatyouwouldadvisethemtodowhenwritingcodeforthissystem.Provideaonesentenceexplanationforeachpointofadvice.

（1markforeachvalidpieceofadvice,1forexplainingitand1foraddinganumberthatmakestheadvicespecifictotheprocessordescribedearlier.）

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Exceptwhereotherwiseindicated,usethefollowingoperatingsystemandprocessorcharacteristicsinallquestions.

Youroperatingsystemuses8kbytepages.Themachineyouareusinghasa4-waysetassociative32kbyteunifiedL1cacheanda128entryfullyassociativeTLB.Integerregistersare32bitswide.Physicaladdressesarealso32bits.Itsupportsvirtualaddressesof44bits.Thebusis64bitswide:

themostusualbustransactionhasfourdatacycles.1Gbyteofmainmemoryisinstalled.

n）Whywouldaprocessorexecutebothstatementss1ands2fromacompoundstatement:

if（condition）s1;

elses2;

o）Whatwouldyouexpectthecachelinelengthtobe?

p）Howmanycomparatorsdoesthecacherequire?

q）Howmanybitsdothesecomparatorsworkon?

r）HowmanycomparatorsdoestheTLBrequire?

s）Howmanybitsdothesecomparatorsworkon?

t）Yourprogramisatextprocessorforlargedocuments:

inaninitialcheck,itscansthedocumentlookingforillegalcharacters.Foran8Mbytedocument,whatwouldyouexpectthehitratestobeduringtheinitialcheck?

（Youareexpectedtodoacalculationandgiveanapproximatenumericanswer!

）

（i）Cache

（ii）TLB

u）Underwhatconditionswouldyouexpecttoachieve100%TLBhits?

（Twoanswersrequired.Forone,youareexpectedtodoacalculationandgiveanapproximatenumericanswer!

）

v）Whyarecachesbuiltwithlong（iemorethan8byte）lines?

（Tworeasonsneeded.）

w）Yourprogrammanipulateslargearraysofdata.Inordertoconsistentgoodperformance,youshouldavoidonething.Whatisit?

（Beprecise–anumericanswerrelevanttotheprocessordescribedaboveandanexplanationisrequiredhere.）

x）Whatisthemaximumnumberofpagefaultscanbegeneratedbyasinglememoryaccess?

Explainyouranswer.（Assumethepagefaulthandlerislockedinmemoryandnootherpagefaultsaregeneratedforpagesofinstructions.）

y）Asysteminterfaceunitwilloftenchangetheorderinwhichmemoryaccessesgeneratedbytheprogramareplacedonthesystembus.Givetwoexamplesofsuchre-orderingsandexplainwhytheorderischanged.

zz）Whydoesareadtransactioncheckthewritequeueinasysteminterfaceunit?

aa）Ifyouhadonlyalimitednumberoftransistorsavailableforimprovingbranchperformance,whatpredictionlogicwouldyouadd?

Whywillitwork?

bb）Whydoessuccessfulbranchpredictionimprovetheperformanceofaprocessor?

cc）Givetwoexamplesofspeculationinhighperformanceprocessors.Addasentencetoexplainhowthisimprovesprocessorperformance.

dd）Consideringallthe‘caches’presentinahighperformanceprocessor（instructionanddatacache,TLB,branchhistorybuffer,etc）,whichonesincreasetheperformanceofaprogramwhichsimplycopiesdatafromonelocationtoanother?

Whichoneshavelittleornoeffect?

Agoodanswerwilllisteachcacheandaddasignforincreaseordecreaseandaddasinglephraseofexplanation.

ee）Onasystemwitha128KbyteL1cacheforaprogramwithaworkingdatasetof2Mbytes:

a.Calculatetheexpectedcachehitratewhennoassumptionscanbemadeaboutdataaccesspatterns.

Hitrate=128x103/2x106=6%

Answerstogreateraccuracyarewrong!

Workingdatasetsizehasbeenspecifiedto1significantfigureonly,soanswerisonlygoodfor1significantfigure!

b.Wouldyouexpecttheactualhitratetobebetterorworsethanthis?

Why?

Better–thisassumesperfectlyrandomaccesstoeverything.Loopvariables,constants,etcarelikelytohavemuchbetterhitrates.

ff）Yoursystemhasa4-waysetassociativecachewith432-bitwordspercacheline.

a.Ifthetotalcachesizeis64kbytes,howmanysetsarethere?

64kbytes/（4ways*4bytes/word*4words/line）=1024

b.Aphysicaladdressonthissystemhas32-bits.Howmuchmainmemorycanitaccommodate?

232=4Gbytes

c.Whatisthetotalnumberofbitsareneededforthecache?

It’sawrite-backcache.

Data:

64kx8bits

2bitsusedtoaddressabytewithinaword+2bitsforawordwithinalinenotneededintag（or,equivalently,4bitsfor16bytes/line）

Addressingasetrequires10bits,sotagshave32-10-4=18bits

Valid+dirty+LRU=3bits

Totaloverheadpercacheline:

18+3=21bits

Numberofcachelines:

64kb/4=16k

Totalbits:

64kx8+16kx21

d.Howmanycomparatorsdoesthiscacherequire?

Oneperway-4

e.Howaretherealaddressesoflinesinthesamesetrelated?

They’reseparatedbyamultipleof1024（numberofsets）*16（numberofbytesinaline）

f.Ifthiscachewasfullyassociative,

i.Howmanycomparatorswouldbeneeded?

Oneperline–16k!

ii.Howmanyoverheadbitswouldberequired?

Tagsneedtobe30bitsnow（32-4）+valid+dirty+LRU（2ormore）=32+bits/line（dependsonhowmanybitsusedforLRUalgorithm）

iii.Whatwouldbetheadvantage（ifany）obtainedfromtheextraresources.

Highertoleranceofnon-uniformdistributionsofaddresses–abilitytotoleratemore‘hits’onthesameset!

gg）YourOSusesapagesizeof8kbytes.

a.Whatisthecoverageofa64entryTLB?

64x8kybtes=512kbytes

b.WhatwilltheTLBhitratebefora2Mbworkingdatasetprogram（makingnoassumptionsaboutaccesspatterns）?

Worstcase:

512k/2Mb=25%

c.Iftheprogramsweepsthroughthedataaccessing64-bitdoublesinsequentialorder,whatwilltheTLBhitratebe?

1kdoubles/page,worstcaseis1TLBmiss/page,somissrateis0.1%andhitrate99.9%

hh）It’snecessaryforaprocessortoprovideaninstructiontoinvalidateallorpartofacache.Why?

ToallowthelocationsintowhichaDMAoperationwillbeperformedtobeflushedfromthecache.

Toflushdatabelongingtoanoldpageoutofthecacheonpageswap.

ii）ThePowerPCallowsyoutomarksomepagesofmemoryas“nottobecached”.Whywouldyouwanttodothis?

IfyoumarkI/Obufferslikethis,thenwritestothemalwaysgodirectlytomemory（notwastingcachespace）andtheydon’tneedtobeinvalidatedwhennewDMAoperationsareperformed.MostOS’swillcopydatafromreadbufferstoauser’saddressspaceimmediatelyafterit’sbeenreadfromthedevice,sothere’snoadvantageincachingit:

it’sonlyeverreadonce.

jj）Whatbenefitwouldyouexpectfromafullyassociativecache（comparedtoothercacheorganizations）?

kk）Despitethis,fullyassociativ