DDR3 SPD 附中文翻译.docx

DDR3 SPD 附中文翻译.docx

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DDR3SPD附中文翻译

UnderstandingDDR3SerialPresenceDetect（SPD）Table

Tuesday,July17,2007

Introduction

SinceIwrote揢nderstandingDDRSerialPresenceDetect（SPD）Table?

in2003,Ihavebeengettingalotafeedbackfromreaders.Iadded揢nderstandingDDR2SerialPresenceDetect（SPD）Table?

in2006. SomeofyoutoldmethatyouareusingthesearticlestotrainyouremployeesandtointroducethemysteriesSPDconcepttoyourcustomers.Ifeelhonoredbyyourresponses.

Lately,CSThasstartedshipmentofaDDR3EZProgrammer.SincetheDD3DIMMisintroducedrecently,IthinkthisisthetimetoaddanarticlefortheDDR3SPDTable.Duetothemanymoreyearsofdevelopment,theDD3SPDtablehasdefinitelygotmoresophisticatedthantheoriginalDDRandDDR2SPDtable.Yourattentionisrequiredtounderstandandfollowthrough.IwilltrytouseasmuchlaymanlanguageasIcantoaccommodateyouall.

SerialPresenceDetect（SPD）dataisprobablythemostmisunderstoodsubjectinthememorymoduleindustry.MostpeopleonlyknowitasthelittleEepromdeviceontheDIMMthatoftenkeptthemodulefromworkingproperlyinthecomputer.Onthecontrary,itisquitetheopposite.TheSPDdataactuallyprovidevitalinformationtothesystemBiostokeepthesystemworkinginoptimalconditionwiththememoryDIMM.ThisarticleattemptstoguideyouthroughtheconstructionofanSPDtablewith揟urbo-Tax?

typeofmultiplechoicesquestions.Ihopeyou抣lfinditinterestinganduseful.

SampleJedecStandardSPDDataTable

Byte0

NumberofSerialPDBytesWritten/SPDDeviceSize/CRCCoverage

（写入的SPD字节数/EERPOM总字节数/CRC覆盖字节范围）

Bit3toBit0describesthetotalsizeoftheserialmemoryactuallyusedintheEEpromfortheSerialPresenceDetectdata.Bit6toBit4describesthenumberofbytesavailableintheEEpromdevice,usually128byteor256byte.Ontopofthat,Bit7indicateswhethertheuniquemoduleidentifiercoveredbytheCRCencodedonbytes126and127isbasedon（0-116byte）orbasedon（0-125byte）..

（WhenCSTEZ-SPDProgrammerisused:

Simplyselectitemsfrom3tablesandautomaticallycalculatethefinalhexnumber）

Themostcommononeusedis:

TotalSPDBye=256

CRCCoverage=0-116Byte

SPDByteused=176Byte

Resultingcodeis   92h

Byte1

SPDRevision（SPD规范版本）

Version  0.0             00h

Revision0.5             05h

Revision1.0             10h

Revision1.1             11h

Revision1.2             12h 

Byte2（DRAM类型）

DRAMDeviceType

ThisreferstotheDRAMtype.Inthiscase,weareonlydealingwithDDR3SDRAM.

DDR3 SDRAM:

    0Bh    

Byte3

ModuleType（内存module类型）

Thisrelatestothephysicalsize,andcategoryofmemorymodule.

Undefined                              00h

RDIMM（RegisteredLongDIMM）   01h

UDIMM（UnbufferedLongDIMM） 02h

SODIMM（SmallOutlineDIMM）     03h

Byte4

SDRAMDensityandBanks（DRAM容量和内部bank数）

ThisbytedefinesthetotaldensityoftheDDR3SDRAM,inbits,andthenumberofinternalbanksintowhichthememoryarrayisdivided.

PresentlyallDDR3have8internalbanks.

SDRAMChipSize  

512Mb          01h

1Gb              02h  

2Gb              03h

4Gb              04h             

Byte5

SDRAMAddressing（DRAM行列地址线数目）

ThisbytedescribestherowaddressingandcolumnaddressingintheSDRAMDevice.

512Mbchips   

13RowX10Column        09h             

13RowX12Column        0Bh

12RowX10Column        01h

1Gbchips        

14RowX10Column        11h

14RowX12Column         13h

13RowX10Column         09h

2Gbchips        

15RowX 10Column        19h

15RowX12Column        1Bh

14RowX10Column         11h

Byte6（预留）

Reserved      00h

Byte7（内存module架构）

ModuleOrganization

ThisbytedescribestheorganizationoftheSDRAMmodule;thenumberofRanksandtheDeviceWidthofeachDRAM

（WhenCSTEZ-SPDProgrammerisused:

SimplyselectnumberofRanksandDeviceWidth.Itautomaticallycalculatefinalhexnumber）

1RankmoduleusingX8chips      01h

2RankmoduleusingX8chips       09h

1RankmoduleusingX4chips       00h  

2RankmoduleusingX4chips       08h

4RankmoduleusingX8chips      19h

4RankmoduleusingX4chips        18h

1RankmoduleusingX16chips      02h

2RankmoduleusingX16chips      0Ah

Byte8

ModuleMemoryBusWidth（内存总位宽）

ThisreferstotheprimarybuswidthofthemoduleplustheadditionalwithprovidedbyECC

16bit                            01h

32bit                            04h

64bit（noparity）             03h

64bit+ECC（72bit）        0Bh 

Byte9

Finetimebase（FTB）Dividend/Divisor（时基）

Thisbytedefinesavalueinpicosecondsthatrepresentsthefundamentaltimebaseforfinegraintimingcalculations.Thisvalueisusedasamultiplierforformulatingsubsequenttimingparameters.ThegranularityinpicosecondsisderivedfromDividendbeingdividedbytheDivisor.

Granularity:

2.5ps       52h

5ps          55h                         

Byte10

MediumTimebase（MTB）Dividend（时间参数编码所用时基的分子）

Byte11

MediumTimebase（MTB）Divisor（时间参数编码所用时基的分母）

Thesebytedefinesavalueinnanosecondsthatrepresentsthefundamentaltimebaseformediumgraintimingcalculations.Thisvalueisusedasamultiplierforformulatingsubsequenttimingparameters.ThetwobyteformstheDividendandtheDivisortodeterminethegranularityofthemediumtimebase.

Granularity 

0.125ns             Byte10      01h     Byte 11     08h

0.0625ns            Byte10      01h     Byte 11     0Fh  

Byte12

MinimumSDRAMCycleTime（tCKmin）（DRAM颗粒最小时钟周期）

Thisbytedescribestheminimumcycletimeforthemoduleinmediumtimebase（MTB）units.

ForMTBgranularity=0.125ns（Byte10andByte11）

DDR3400Mhzclock（800datarate）                 14h

DDR3533Mhzclock（1066datarate）               0Fh

DDR3667Mhzclock（1333datarate）               0Ch

DDR3800Mhzclock（1600datarate）               0Ah 

Byte13  （预留）

Reserved           00h

Byte14

CASLatenciesSupported,LowByte（支持CL值范围，低位字节）

（WhenCSTEZ-SPDProgrammerisused:

Simplyselectalllatenciessupportedfromtable.Automaticallycalculatethehiandlowbytehexvaluebaseonbinarynumber）

Latency5.6supported                06h

Latency6   supported                04h

Latency6,7supported                0Ch

Latency5,6,7,8supported        1Eh

Byte15

CASLatenciesSupported,HighByte 00h（支持CL值范围，高位字节）

Byte16

MinimumCASLatencyTime（tAAmin）（CAS延迟平均时间tAAmin）

MinimumCASLatencybasedonmediumtimebase（MTB）units.tAAmincanbereadoffSDRAMdatasheet.

Basedonmediumtimebaseof0.125ns

tAAmin   

12.5ns         DDR3-800D       64h          

15ns           DDR3-800E       78h

11.25ns       DDR3-1066E     5Ah

13.125ns     DDR3-1066F      69h

15ns           DDR3-1066G     78h

10.5ns         DDR3-1333F      54h

12ns           DDR3-1333G      60h

13.5ns         DDR3-1333H      6Ch

15ns            DDR3-1333J       78h

10ns            DDR3-1600G      50h

11.25ns      DDR3-1600H      5Ah

12.5ns       DDR3-1600J       64h

13.75ns      DDR3-1600K      6Eh

Byte17

MinimumWriteRecoveryTime（tWRmin）（最小写恢复时间tWRmin）

ThisbytedefinestheminimumSDRAMwriterecoverytimeinmediumtimebase（MTB）units.ThisvalueisreadfromtheDDR3SDRAMdatasheet.

Basedonmediumtimebaseof0.125ns

tWRmin       

15ns                        78h

12ns                        60h

16ns                        80h

Byte18

MinimumRAS#toCAS#Delaytime（tRCDmin）（RAS到CAS的延迟时间tRCDmin）

ThisbytedefinestheminimumSDRAMRAS#toCAS#Delayin（MTB）units

Basedonmediumtimebaseof0.125ns

tRCDmin    

12.5ns         DDR3-800D       64h          

15ns           DDR3-800E       78h                     

11.25ns       DDR3-1066E     5Ah                    

13.125ns     DDR3-1066F      69h                    

15ns           DDR3-1066G     78h

10.5ns        DDR3-1333F      54h

12ns           DDR3-1333G      60h

15ns           DDR3-1333J       78h

10ns           DDR3-1600G      50h

11.25ns      DDR3-1600H      5Ah

12.5ns       DDR3-1600J       64h

13.75ns      DDR3-1600K      6Eh

Byte19

MinimumRowActivetoRowActiveDelaytime（tRRDmin）（ROW激活命令间隔时间tRRDmin）

ThisbytedefinestheminimumSDRAMRowActivetoRowActiveDelayin（MTB）units.ThiscanbereadfromtheSDRAMdatasheet.

 Basedonmediumtimebaseof0.125ns

tRRDmin    

6.0ns        30h                               

7.5 ns       3Ch

10 ns        50h

Byte20

MinimumRowPrechargeDelayTime（tRPmin）（预充电precharge延迟时间tRPmin）

ThisbytedefinestheminimumSDRAMRowPrechargeDelayin（MTB）units.ThiscanbereadfromtheSDRAMdatasheet.

Basedonmediumtimebaseof0.125ns

tRPmin       

12.5ns         DDR3-800D       64h          

15ns            DDR3-800E       78h

13.125ns     DDR3-1066F      69h

15ns            DDR3-1066G     78h

10.5ns         DDR3-1333F      54h

12ns            DDR3-1333G      60h

13.5ns         DDR3-1333H      6Ch

15ns           DDR3-1333J       78h

10ns           DDR3-1600G      50h

11.25ns      DDR3-1600H      5Ah

12.5ns       DDR3-1600J       64h

13.75ns      DDR3-1600K      6Eh

Byte21

UpperNibblesfortRASandtRC（tRAS和tRC时间的高位字节）

ThisbytemakesuptheMSB（upper4bits）ofthetRAS（bits3-0）andtRC（bits7-4）forByte 22（tRASlowerbyte）andByte23（tRClowerbyte）.Theyarein（MTB）units.

Basedonmediumtimebaseof0.125ns

Thesenibblesrepresentsthevalueof256（inMTBunits）forboththetRASandtRCuppernibble..Therefore,thevalueisalways 

 11h

Byte22

MinimumActivetoPrechargeDelayTime（tRASmin）,LeastSignificantByte

（激活到预充电延迟时间tRAS的低位字节）

Thisbyteisthelower8bitsofthe12bittRASvalue.Itisr