VHDL实现简易计算器.docx
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VHDL实现简易计算器
libraryIEEE;
useIEEE.STD_LOGIC_1164.ALL;
useIEEE.STD_LOGIC_ARITH.ALL;
useIEEE.STD_LOGIC_UNSIGNED.ALL;
entitycalculatoris
Port(clr,clk,dent,ch,set:
instd_logic;
add,sub,mul,div:
instd_logic;
outrange,minus:
outlogic;
led1:
outstd_logic_vector(6downto0);
led2:
outstd_logic_vector(6downto0);
led3:
outstd_logic_vector(6downto0);
led4:
outstd_logic_vector(6downto0);
endcalculator;
architectureBehavioralofcalculatoris
signalsec_1_10,sec1:
std_logic;
signalget,minus_sig:
integerrange0to3;
signalchoose:
integerrange0to5;
signalchose:
integerrange0to7;
signalL2,LL2,LLL2,LLLL2:
integerrange0to10;
signalL1,LL1,LLL1,LLLL1:
integerrange0to10;
signalL,LL,LLL,LLLL:
integerrange0to10;
signalnn:
integerrange0to9999;
signalbi:
integerrange0to20000;
begin
分频模块
process(clr,clk)
variablec:
integerrange0to10;
begin
ifclr=‘0’thenc:
=0;
elsifrising_edge(clk)then
ifc<10thenc:
=c+1;
elsec:
=0;
endif;
endif;
ifc>5thensec1<=‘1’;
elsesec1<=‘0’;
endif;
endprocess;
process(clr,clk)
variablec:
integerrange0to3200000;
begin
ifclr=‘0’thenc:
=0;
elsifrising_edge(clk)then
ifc<3200000thenc:
=c+1;
elsec:
=1;
endif;
endif;
ifc>1600000thensec_1_10<=‘1’;
elsesec_1_10<=‘0’;
endif;
endprocess;
键控模块
process(sec_1_10,clr,mul,div,sub,add,set)
variablecc,dd:
std_logic;
variablep,pp:
integerrange0to3;
variablec:
integerrange0to5;
variablem:
integerrange0to7;
variabled,e,f,g:
integerrange0to9;
variableee:
integerrange0to90;
variableff:
integerrange0to900;
variablegg:
integerrange0to9000;
begin
ifclr=‘0’or((mul=‘0’ordiv=‘0’orsub=‘0’oradd=‘0’)andset=‘1’andch=‘1’)
thenc:
=0;d:
=0;e:
=0;f:
=0;g:
=0;ee:
=0;ff:
=0;gg:
=0;m:
=0;p:
=0;cc:
=0;dd:
=0;
pp:
=0;
elsifrising_edge(sec_1_10)then
ifdent=‘1’then
ifm<7thenm:
=m+1;
elsem:
=7;
endif;
elsifset=‘0’andadd=‘0’thendd:
=‘1’;
elsifdd=‘1’then
ifpp<3thenpp:
=pp+1;
elsepp:
=0;dd:
=‘0’;
endif;
elsifdiv=‘0’andset=‘0’thencc:
=‘1’;
elsifcc=‘1’then
ifp<3thenp:
=p+1;
elsep:
=3;cc:
=‘0’;
endif;
elsifch=‘0’then
ifc<5thenc:
=c+1;
elsec:
=1;
endif;
elsifc=2andset=‘0’then
ifd<9thend:
=d+1;
elsed:
=0;
endif;
elsifc=3andset=‘0’then
ife<9thene:
=e+1;ee:
=ee+10;
elsee:
=0;ee:
=0;
endif;
elsifc=4andset=‘0’then
iff<9thenf:
=f+1;ff:
=ff+100;
elsef:
=0;ff:
=0;
endif;
elsifc=5andset=‘0’then
ifg<9theng:
=g+1;gg:
=gg+1000;
elseg:
=0;gg:
=0;
endif;
elsenull;
endif;
endif;
choose<=c;L1<=d;LL1<=e;LLL1<=f;LLLLL1<=g;
nn<=d+ee+ff+gg;chose<=m;get<=p;minus_sig<=pp;
endprocess;
运算及存储模块
process(clr,sec1,bi)
variableminmmin:
std_logic;
variablead,sb,mu,dv:
std_logic_vector(1downto0);
variablec,d,f,g,m:
integerrange0to20000;
begin
ifclr=‘0’thenmin:
=‘1’;c:
=0;d:
=0;f:
=0;g:
=0;bi<=0;
sb:
=“00”;ad:
=“00”;mu:
=“00”;dv:
=“00”;outrange<=‘1’;
elsifrising_edge(sec1)then
ifset=‘0’andmul=‘0’thenmmin:
=min;
ifad:
=“00”andsb:
=“00”andmu:
=“00”anddv:
=“00”thenm:
=nn;
elsem:
=bi;
endif;
elsifset=‘0’anddiv=‘0’thenbi<=m;d:
=m;min:
=mmin;ad:
=“10”;
elsifminus_sig=3thenmin:
=not(min);
elsifsub=‘0’andset=‘1’thensb:
=“01”;ad:
=“00”;mu:
=“00”;dv:
=“00”;
elsifadd=‘0’andset=‘1’thenad:
=“01”;sb:
=“00”;mu:
=“00”;dv:
=“00”;
elsifmul=‘0’andset=‘1’thenmu:
=“01”;ad:
=“00”;sb:
=“00”;dv:
=“00”;f:
=0;g:
=0;
elsifdiv=‘0’andset=‘1’thendv:
=“01”;ad:
=“00”;sb:
=“00”;mu:
=“00”;f:
=0;
elsifdent=‘0’andad=“00”andsb=“00”andmu=“00”anddv=“00”thend:
=nn;bi<=nn;
elsif(ad=“10”orsb=“10”ormu=“10”ordv=“10”)anddent=‘0’thend:
=bi;
elsifsb=“10”anddent=‘1’thenc:
=nn;
ifmin=‘1’thensb:
=“10”;
ifd>=cthend:
=d-c;bi<=d;
elsemin:
=‘0’;bi<=c-d;
endif;
elsif(c+d)<10000thensb:
=“10”;bi<=(c+d);
elseoutrange<=‘0’;bi<=0;
endif;
elsifad=“01”anddent=‘1’thenc:
=nn;
ifmin=‘1’thenad:
=“10”;
if(c+d)<10000thend:
=(c+d);bi<=d;
elseoutrange<=‘0’;bi<=0;
endif;
elsifc=“10”;
elsemin:
=‘1’;bi<=c-d;ad:
=“10”;
endif;
elsifmu=“01”anddent=‘1’thenc:
=nn;
ifc=0ord=0thenbi<=0;
elsiff=g+d;
ifg>9999thenbi<=0;outrange<=‘0’;
elsef:
=f+1;
endif;
elsebi<=g;mu:
=“10”;
endif;
elsifdv=“01”anddent=‘1’thenc:
=nn;
ifc=0thenbi<=0;outrange<=‘0’;
elsifc=1thenbi<=d;
elsifd>=cthen
iff<20000thend:
=d-c;f:
=f+1;
elsenull;
endif;
elsifd=“10”;
elsebi<=f+1;dv:
=“10”;
endif;
elsenull;
endif;
endif;
minus<=min;
endprocess;
process(get,sec1,clr,mul,div,sub,add,bi,set)
variablecc,dd,ee:
integerrange0to10;
variablebb:
integerrange0to20000;
begin
ifclr=‘0’or((mul=‘0’ordiv=‘0’orsub=‘0’oradd=‘0’)andset=‘1’andch=‘1’)orget=1
thencc:
=0;dd:
=0;ee:
=0;bb:
=0;
elsifrising_edge(sec1)then
ifchose=5orget=2thenbb:
=bi;
elsifbb>999thencc:
=cc+1;bb:
=bb-1000;
elsif