LCD万年历程序.docx
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LCD万年历程序
---本程序初始化与数据写入LCD的系统频率不变,
---这样受初始化延时限制整体时钟不快，但能满足要求。
LIBRARYieee;
USEieee.std_logic_1164.all;
USEieee.std_logic_unsigned.all;
USEieee.numeric_std.all;
ENTITYsent_data_to_lcdIS
PORT（
Fu_Wei:
INSTD_LOGIC;
clk_1MHz:
inSTD_LOGIC;
clk_10KHz:
inSTD_LOGIC;
clk_50Hz:
inSTD_LOGIC;
clk_1Hz:
inSTD_LOGIC;
position:
instd_logic;
number:
instd_logic;
display:
instd_logic;
RS:
outSTD_LOGIC;
RW:
outSTD_LOGIC;
E:
outSTD_LOGIC;
D:
outSTD_LOGIC_vector（7downto0）
）;
end;
architecturedoitofsent_data_to_lcdis
signalclk10KHz,E1:
std_logic;
signaldelay:
naturalrange0to260;
constantC40ms:
natural:
=200;--延时40ms应需5KHz时钟脉冲个数为：
C40ms=40/T_5=40/0.2=200
constantC10ms:
natural:
=50;----E1一次变化一个周期需要2ms
constantEnd_Time:
natural:
=260;
----------------10位秒表信号与常量定义--------------
signalcounter:
naturalrange0to80;
signalposition_temp,number_temp:
naturalrange0to10;
signalms_sec:
naturalrange0to1000;
signalus_sec:
naturalrange0to1000;
signalT_sec,T_min:
naturalrange0to60;
------------万年历信号与常量定义-----------------
signalyear:
naturalrange0to9999;
signalmonth:
naturalrange0to12;
signaldate:
naturalrange0to31;
signalD_sec,D_min:
naturalrange0to60;
signalD_hour:
naturalrange0to24;
--constantC5KHz:
natural:
=2000;
--constantC1MHz:
natural:
=20;
begin
--------分频产生5KHz信号clk5KHz--------
---根据初始化是需要求：
POWERON--->Waittime>40ms--->FunctionSet--->Waittime>100us
------>FunctionSet--->Waittime>37us--->DisplayON/OFFControl--->Waittime>100us
----->DisplayClear，Wait--->time>10ms--->Entermodeset--->Initializationend。
---5KHz的T_5=0.2ms=200us
process（position）
begin
ifrising_edge（position）then
ifposition_temp<9then
position_temp<=position_temp+1;
else
position_temp<=0;
endif;
endif;
endprocess;
process（number）
begin
ifrising_edge（number）then
ifnumber_temp<9then
number_temp<=number_temp+1;
else
number_temp<=0;
endif;
endif;
endprocess;
--------------------万年历计算模块-------------------------
--year<=year4&year3&year2&year1;
--month<=month2&month1;
--date<=date2&dare1;
process（clk_1Hz）
begin
--ifFu_Wei='0'then
--ms_sec1<=0;ms_sec2<=0;ms_sec3<=0;
--us_sec1<=0;us_sec2<=0;us_sec3<=0;
--elsifdisplay='0'then
--ms_sec1<=ms_sec1;ms_sec2<=ms_sec2;ms_sec3<=ms_sec3;
--us_sec1<=us_sec1;us_sec2<=us_sec2;us_sec3<=us_sec3;
--ifposition_temp>0then
--ifnumber_temp=0thenms_sec2<=10;
--elsems_sec2<=number_temp;
--endif;
--endif;
ifrising_edge（clk_1Hz）then
ifD_sec<59then--D_sec1<9then
D_sec<=D_sec+1;---D_sec1<=us_sec1+1;
else
D_sec<=0;--D_sec1<=0;
ifD_min<59then--D_sec2<5then
D_min<=D_min+1;--D_sec2<=D_sec2+1;
else
D_min<=0;--D_sec2<=0;
ifD_hour<23then--D_min1<9then
D_hour<=D_hour+1;--D_min1<=D_min1+1;
else
D_hour<=0;--D_min1<=0;
if（month=1ormonth=3ormonth=5ormonth=7ormonth=8ormonth=10ormonth=12）then
ifdate<31thendate<=date+1;
elsedate<=1;
endif;
elsif（month=4ormonth=6ormonth=9ormonth=11）then
ifdate<30thendate<=date+1;
elsedate<=1;
endif;
elsifmonth=2then
if（year/4=0or（year/100=0andyear/400=0））then
ifdate<29thendate<=date+1;
elsedate<=5;
endif;
else
ifdate<28thendate<=date+1;
elsedate<=1;
endif;
endif;
endif;
ifdate=1then
ifmonth<12thenmonth<=month+1;
elsemonth<=1;
ifyear<9999thenyear<=year+1;
elseyear<=2010;
endif;
endif;
endif;
endif;
endif;
endif;
endif;
endprocess;
------------------------10位秒表计算模块--------------------------
process（clk_1MHz）
begin
ifFu_Wei='0'then
us_sec<=0;ms_sec<=0;
T_sec<=0;T_min<=0;
elsifdisplay='0'then
us_sec<=us_sec;ms_sec<=ms_sec;
T_sec<=T_sec;T_min<=T_min;
--ifposition_temp>0then
--ifnumber_temp=0thenms_sec2<=10;
--elsems_sec2<=number_temp;
--endif;
--endif;
elsifrising_edge（clk_1MHz）then
ifus_sec<999then
us_sec<=us_sec+1;
else
us_sec<=0;
ifms_sec<999then
ms_sec<=ms_sec+1;
else
ms_sec<=0;
ifT_sec<59then
T_sec<=T_sec+1;
else
T_sec<=0;
ifT_min<59then
T_min<=T_min+1;
else
T_min<=0;
endif;
endif;
endif;
endif;
endif;
endprocess;
---------定时器----------
process（clk_10KHz,Fu_Wei）
begin
ifFu_Wei='0'then
delay<=0;
elsifrising_edge（clk_10KHz）then
ifdelay=End_Timethen
delay<=delay;
else
delay<=delay+1;
endif;
endif;
endprocess;
--从初始化第一条数据FunctionSet，到最后一条数据DisplayClear为4个E1周期,
--共需系统时钟10MHz8个周期
clk10KHz<='0'whendelay<=C40mselse--延时40ms
clk_10KHzwhen（delay>C40msanddelay<=（C40ms+8））else
'0'when（delay>（C40ms+8）anddelay<=（C40ms+8+C10ms））else--再延时10ms
clk_10KHz;
-------------LCD时序控制部分----------
---LCD输出时序处理：
RS=‘1’写数据，RS=‘0’写指令。
RW=‘1’读数据，RW=‘0’写指令。
----E下降沿时输入LCD的数据D有效，E最小周期为1200ns。
process（clk10KHz,Fu_Wei）--clk_5KHz
begin
ifrising_edge（clk10KHz）then
E1<=notE1;
ifE1='1'then
E<='1';
ifcounter<38then
counter<=counter+1;
else
counter<=6;
endif;
else
E<='0';
endif;
endif;
endprocess;
p2:
process（counter）
begin
if（counter<8orcounter=22）then
rs<='0';
rw<='0';
elsifcounter>7then
rs<='1';
rw<='0';
endif;
endprocess;
---------------------------------------------------------------
--
--第一行地址为0x80
--第二行地址为0x90
--第三行地址为0x88
--第四行地址为0x98
--
---------------------------------------------------------------
P3:
process（counter）
begin
casecounteris
when0=>D<="ZZZZZZZZ";
when1=>D<="00110000";--功能设置
when2=>D<="00110000";
when3=>D<="00000110";--输入方式设置
when4=>D<="00000001";--显示开关控制,如果赋"00001110"会产生标记
when5=>D<="ZZZZZZZZ";
when6=>D<="00001100";--清屏
when7=>D<=x"88";--第2行地址90；
when8=>D<=x"20";
when9=>D<=x"20";
when10=>D<=（D_hour/10）+x"30";
when11=>D<=（D_hourmod10）+x"30";
when12=>D<=x"ca";--时
when13=>D<=x"b1";
when14=>D<=（D_min/10）+x"30";
when15=>D<=（D_minmod10）+x"30";
when16=>D<=x"b7";--分
when17=>D<=x"d6";
when18=>D<=（D_sec/10）+x"30";
when19=>D<=（D_secmod10）+x"30";
when20=>D<=x"c3";--秒
when21=>D<=x"eb";
when22=>D<=x"90";
when23=>D<=x"20";
when24=>D<=x"20";
when25=>D<=year/1000+x"30";
when26=>D<=（year/100mod10）+x"30";
when27=>D<=（year/10mod10）+x"30";
when28=>D<=（yearmod10）+x"30";
when29=>D<=x"c4";--年
when30=>D<=x"ea";
when31=>D<=month/10+x"30";
when32=>D<=（monthmod10）+x"30";
when33=>D<=x"d4";--月
when34=>D<=x"c2";
when35=>D<=date/10+x"30";
when36=>D<=（datemod10）+x"30";
when37=>D<=x"c8";--日
when38=>D<=x"d5";
--when13=>D<=ms_sec3+x"30";--"11001101";
--when14=>D<=ms_sec2+x"30";--"10101100";--同
--when15=>D<=ms_sec1+x"30";--"11010010";
--when26=>D<=x"ba";--"10111011";--一
--when27=>D<=x"c1";
--when28=>D<=x"c3";
--when54=>D<=x"eb";
--when46=>D<=x"98";
--when16=>D<=x"20";
--when17=>D<=us_sec3+x"30";
--when18=>D<=us_sec2+x"30";--个
--when19=>D<=us_sec1+x"30";
--when33=>D<=x"ce";--世
--when34=>D<=x"a2";
--when35=>D<=x"c3";
--when36=>D<=x"eb";
whenothers=>null;
endcase;
ENDPROCESS;
ENDdoit;
libraryieee;
useieee.std_logic_1164.all;
useieee.std_logic_unsigned.all;
useieee.numeric_std.all;
entitydivided_clockis
port（
clk_20MHz:
instd_logic;
clk_1MHz:
outstd_logic;
clk_10KHz:
outstd_logic;
clk_50Hz:
outstd_logic;
clk_1Hz:
outstd_logic
）;
end;
architecturedoitofdivided_clockis
signalclk1M,clk10KHz,clk50Hz,clk1Hz:
std_logic;
signalcount1MHz:
naturalrange0to20;--20MHz/1MHz=20
signalcount10KHz:
naturalrange0to1000;--20MHz/10KHz=1000
signalcount50Hz:
naturalrange0to400000;--20MHz/50KHz=400000
signalcount1Hz:
naturalrange0to20000000;--20MHz/1Hz=20000000
constantc_1MHz:
natural:
=20;
constantc_10KHz:
natural:
=1000;
constantc_50Hz:
natural:
=400000;
constantc_1Hz:
natural:
=20000000;
begin
process（clk_20MHz）
begin
ifrising_edge（clk_20MHz）then
ifcount1MHz<（c_1MHz-1）then--50then
count1MHz<=count1MHz+1;
else
count1MHz<=0;
endif;
ifcount1MHz<（c_1MHz/2-1）then--1then
clk1M<='0';
else
clk1M<='1';
endif;
endif;
endprocess;
process（clk_20MHz）
begin
ifrising_edge（clk_20MHz）then
ifcount10KHz<（c_10KHz-1）then--50then
count10KHz<=count10KHz+1;
else
count10KHz<=0;
endif;
ifcount10KHz<（c_10KHz/2-1）then--1then
clk10KHz<='0';
else
clk10KHz<='1';
endif;
endif;
endprocess;
process（clk_20MHz）
begin
ifrising_edge（clk_20MHz）then
ifcount50Hz<（c_50Hz-1）then--50then
count50Hz<=count50Hz+1;
else
count50Hz<=0;
endif;
ifcount50Hz<（c_50Hz/2-1）then--1then
clk50Hz<='0';
else
clk50Hz<='1';
endif;
endif;
endprocess;
process（clk_20MHz）
begin
ifrising_edge（clk_20MHz）then
ifcount1Hz<（c_1Hz-1）then--50then
count1Hz<=count1Hz+1;
else
count1Hz<=0;
endif;
ifcount1Hz<（c_1Hz/2-1）then--1then
clk1Hz<='0';
else
clk1Hz<='1';
endif;
endif;
endprocess;
clk_1MHz<=clk1M;
clk_10KHz<=clk10KHz;
clk_50Hz<=clk50Hz;
clk_1Hz<=clk1Hz;
enddoit;
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