锁相技术译文翻译数字混合PLL频率合成器的开关特性分析.docx

锁相技术译文翻译数字混合PLL频率合成器的开关特性分析.docx

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锁相技术译文翻译数字混合PLL频率合成器的开关特性分析

锁相技术译文翻译

英文原名：

AnalysisofSwitchingCharacteristicsoftheDigitalHybridPLLFrequencySynthesizer

译文：

数字混合PLL频率合成器的开关特性分析

年纪专业：

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英文

中文

AnalysisofSwitchingCharacteristicsoftheDigitalHybridPLLFrequencySynthesizer

Heung-GyoonRyu,Member,IEEE,andHyun-SeokLee

Abstract—Inthispaper,weaddresstheswitchingcharacteristicsofthedigitalhybridphase-lockedloop（DH-PLL）frequencysynthesizer.WeanalyzetheeffectsofthedivisionratioforfrequencysynthesisandthecomponenterrorsofaDH-PLLcircuitontheswitchingperformance.Gainvariation,offseterrorgeneratedinadigital-to-analogconverter,andfrequencydrifterrorofvoltage-controlledoscillationduetotemperatureandagingareconsideredastheerrorsofthecircuitcomponents.Fromthesimulationresults,theconventionalcharge-pumpPLLsystemhasmuchdifferentswitchingtimeforthechangespacingofthefrequencysynthesis.Onthecontrary,thevariationoftheswitchingtimeisnotsogreatintheDH-PLLsystemwhentheerrormagnitudedoesnotexceedthe±4leastsignificantbiterror.Toguaranteetherequiredminimumswitchingspeed,itisimportantthatthetolerableerrorrangebedetermined.

IndexTerms—Deviceerrorandswitching,digitalhybridphase-lockedloop（DH-PLL）,frequencysynthesizer.

I.INTRODUCTION

HIGH-SPEEDswitchingisoneofthemostimportantcharacteristicsinfrequencysynthesizers.In1999,AbouEl-Elaproposedamethodinwhichanadditionalinputtoavoltagecontroloscillator（VCO）isrequiredtogethigherswitchingspeedinaphase-lockedloop（PLL）frequencysynthesizer[1].ThisisastructuretoprovideVCOwithanadditionalinputofthesawtoothwaveusingadigital-to-analog（D/A）converter.Wheneverfrequencyissynthesized,thewaveformgeneratorwiththemostoptimumslopeanddurationisrequired.Therefore,thecomplicateddesignandtheexactsynchronizationforhigh-speedswitchingmakeitdisadvantageous.In1995,MaternaaddressedthePLLstructurebasedonapre-tuningapproachthatusesanexternaltuningvoltagetoaVCObyaD/Aconverterforextremelyhigh-frequencysatelliteapplications[2].However,therewasnodiscussionaboutthesystemswitchingcharacteristics.In2001,Ryuproposedasimplifiedstructurethatimprovesswitchingspeedandpowerconsumptionofthedigitaldirect-frequencysynthesizer（DDFS）-drivenPLL[3].Althoughthereisanadvantageoftheeffectivewide-bandapplications,theoperatingspeedofthewholesystemdependsonPLLspeed.In2000,FouzarproposedaPLLfrequencysynthesizerthathasdual-loopformusingafrequency-to-voltageconverter（FVC）[4].HighswitchingspeedcanbeobtainedbyuseoftheFVCandthecoarsetuningcontrollerusingtheoutputofthephasedetectorandVCO.AdditionalhardwarecomplexityiscumbersomeandFVClimitstheswitchingspeed.

Inthispaper,theswitchingperformancecharacteristicsofthedigitalhybrid（DH）-PLLfrequencysynthesizerbasedonpretuningapproachisaddressed.TheeffectsofthedivisionratioforfrequencysynthesisanderrorsofcircuitcomponentsontheswitchingperformanceoftheDH-PLLarenewlyanalyzedandpresentedwithsimulationresults.Gainvariation,offseterrorgeneratedinaD/Aconverter,andfrequencydrifterrorofVCOduetotemperatureandagingcanbeincludedintheerrorsofthecircuitcomponents.D/Aconvertersof10-,12-,and14-bitwordlengthareconsideredinthepaper.

II.DH-PLLFREQUENCYSYNTHESIZER

Fig.1showsablockdiagramofadigitalhybridPLL.TheVCOiscontrolledbyacompositesignalofbothloopfilteroutputandD/Aconverteroutput.DH-PLLisahybridstructureoftheconventionalclosed-loopcharge-pumpPLLandopen-loopVCOcontrol,whichismadeupofthedigitallookuptable,D/Aconverter,andVCO.Thedigitallookuptablewiththeinformationaboutthevoltage-frequencycharacteristicofVCOrapidlyleadsthesteady-statevoltagebytheD/Aconverteroutput.Afrequencycontrolwordgoesintotheprogrammablecounterandlookuptableatthesametime.

InthisDH-PLL,theloopfilterasshowninFig.2isusedsincetheconventionalclosed-loopisthetypeIIcharge-pumpPLLsystem[5],[6],[9].

Atfirst,C1andR1areconsideredforasecond-orderPLLsystemdesigntomeetthedesiredspecificationswithoutC2.

Next,toreducetherippleofthesteady-stateresponse,asmallC2isaddedthatismuchsmallerthanC1andhaslittleeffecton

theloopdynamics.So,inthiscase,thePLLnaturalfrequency（ωn）andthedampingfactor（ζ）aregivenby[6],[7]

WhereKpdisthecombinedtransfergainofthephase-frequencydetectorandcharge-pump,KvcoistheVCOgainfactor,andNisthedivisionratio.Thedampingfactorisselectedinthefirstplaceandcanbeobtainedby

（2）.Dampingfactor（ζ）hastobebiggerthanthecommonvalueusedintheconventionaldesignforthesmoothtransientresponseinfrequencyhoppingprocess.Thereasoncanbeexplainedasfollows.ItistruethatasmoothtransientresponsereducestheswitchingspeedintheconventionalPLLsystem.IntheDH-PLLsystem,however,thesmoothnessisimportantandenhancestheaccuracyandstabilityofoutputfrequencyinsteadystateatverylittlesacrificeoftheswitchingtime,sincethehigh-speedswitchingcharacteristicisalreadyguaranteedinpretunestructure.Soitrangesfrom1.0to1.5.Next,theC2oftheloopfilterisusedfortheripplecontrolandtransientresponseofVCOcontrolvoltage.C2isC1/α,whereαisconstant.Ifαissmall,VCOcontrolvoltagehasasmallripplethatalsoproducessmalljitter,butthetransientresponsebecomesslow.Ontheotherhand,largeαleadstofasttransientresponsebutalargeripple,whichmakestheoutputjitterincrease.Sincethesmoothness,fasttransientresponse,andsmallerrippleofVCOcontrolvoltagearesimultaneouslyconsideredinthispaper,simulationresultsshowthatitispropertoselectα=10.Then,theclosed-loopPLLcanbeapproximatedtothesecond-ordersystem,sinceC2haslittleeffectontheloopdynamics[8].

Fig.3.SwitchingresponsesofVCOcontrolvoltage（ζ=1andα=10）.（a）PLL（15.0-15.1MHz）;（b）DH-PLL（15.0-15.1MHz）.（c）PLL（15.0

-30.0MHz）;（d）DH-PLL（15.0-30.0MHz）.

Fig.4.ErroreffectsofD/AconverterandVCO.

Fig.5.Mathematicalmodelsofdeviceerrors.

III.ANALYSISOFSWITCHINGCHARACTERISTICS

A.DivisionRatio

Theswitchingtimeandoutputjittercharacteristicofthefrequencysynthesizerdependonthefrequencydivisionratio.Dampingfactorζis1.0forbothconventionalPLLand

DH-PLL.ParameterizationofloopfilterinFig.2isbasedonthesecond-orderPLLsystem.Inputreferencefrequencyis100kHz,phasedetectorgain（Kpd）is1mA/2π,VCOgain（Kvco）is5MHz/V,andoutputfrequencybandwidthis15～30MHz.Frequencysynthesisspacingisdividedintotwogroups:

narrowhopping（from15.0to15.1MHz）andwidehopping（from15.0to30.0MHz）.Settlingtimeisdefinedastherequiredtimethattheresponserippleisreducedintolessthan1%offrequencyhopspacingbydivisionratio.

TheperformanceanalysisresultsareshowninTableI.RipplevoltageismeasuredinsteadystateofVCOcontrolvoltage.Inthecaseofnarrowhopspacing,DH-PLLisabout5.84times

fasterthantheconventionalPLL,asshowninFig.3（a）,（b）.Inthecaseofwidehopspacing,theDH-PLLis31.68timesfasterthantheconventionalsystem.Thereisa7.26timesdifferenceinswitchingspeedbetweennarrowhoppingandwidehoppingoftheconventionalPLL.Onthecontrary,DH-PLLhasasmallgapof1.34timesinthesamecondition.Therefore,thereisnogreatswitchingperformancevariationaccordingtofrequencyhopspacinginDH-PLL.

AsshowninTableI,theVCOcontrolvoltagerippleoftheDH-PLLsystemisnotgreatlydifferentfromtherippleoftheconventionalPLLsystemwhenαisten.Also,iftheDH-PLL

systemisathird-ordersysteminthecaseofα=5,wegetthelowerrippleinthesteadystatebythesimulationatverylittlesacrificeofswitchingtime.Inthecaseofatype-IPLLsystemthatisnotcharge-pumpedPLL,thetransientresponseofthethird-orderPLLsystemcouldbeevenfasterthanthatofthesecond-ordersystem[10].However,thethird-ordersystemgenerallyexhibitsslowertransientresponsethanthesecond-ordersysteminthecaseofatype-IIcharge-pumpedPLLsystem,asinthispaper[9].

Fig.6.SwitchingresponsesversusseveralD/Aconverterword（W）errors.（a）ConventionalPLL:

15.0-18.0MHz.（b）DH-PLL:

NoerrorcaseofW=153,15.0-18.0MHz.（c）DH-PLL:

NoerrorcaseofW=153,15.0-18.0MHz.（d）IncaseofW=

155,+2LSBerror.（e）IncaseofW=149,-4LSBerror.

B.DeviceErrors

IntheDH-PLLarchitecture,aD/AconverteroutputsananalogcontrolvoltagetowhichVCOwillbesettled.TheremaybetheproblemthattheD/Aconvertercanproduceanundesiredoutputvoltagebyanunexpectederror.ItmaybegainerrorandoffseterroroftheD/Aconverterduetothetemperaturevariationanddeviceaging.Inaddition,thecharacteristiccurveofVCOmaybemovedtogeneratefrequencydrifterrorbecauseofthetemperatureandaging.Thiserrormaymakeaseriousinfluenceuponthesynthesizersystem.IntheD/ApartofFig.4,aistheidealoutputoftheD/Aconverter,bistheD/Aconverteroutputwhenoffseterroronlyexists,andcistheD/Aconverteroutputwhenbothoffsetandgainerrorexist.IntheVCOpart,AisadesiredoutputofVCOandBisoutput

bycoftheD/Apart.CandDareoutputbycoftheD/Apartandfrequencydrift.

Fig.5isamathematicalmodelofFig.4.TheoutputvoltageofthepracticalD/Aconverterbecomes