svpwm源程序Word文件下载.docx
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#include"
DSP28x_Project.h"
//DeviceHeaderfileandExamplesIncludeFile
//Prototypestatementsforfunctionsfoundwithinthisfile.
voidInitEPwm1Example（void）;
voidInitEPwm2Example（void）;
voidInitEPwm3Example（void）;
voidsvpwmGen（void）;
interruptvoidsvpwm_isr（void）;
volatilefloatUalpha,Ubeta;
volatilefloatA,B,C;
volatilefloatT0,T1,T2,T3,T4,T5,T6;
volatilefloatTaon,Tbon,Tcon;
floatUa,Ub,Uc;
floatTs;
inta,b,c;
intN=0,sector=0;
#defineTPRD800
#defineUdc800
voidmain（void）
{
//Step1.InitializeSystemControl:
//PLL,WatchDog,enablePeripheralClocks
//ThisexamplefunctionisfoundintheDSP2833x_SysCtrl.cfile.
InitSysCtrl（）;
//Step2.InitalizeGPIO:
//ThisexamplefunctionisfoundintheDSP2833x_Gpio.cfileand
//illustrateshowtosettheGPIOtoit'
sdefaultstate.
//InitGpio（）;
//Skippedforthisexample
//ForthiscasejustinitGPIOpinsforePWM1,ePWM2,ePWM3
//ThesefunctionsareintheDSP2833x_EPwm.cfile
InitEPwm1Gpio（）;
InitEPwm2Gpio（）;
InitEPwm3Gpio（）;
//Step3.ClearallinterruptsandinitializePIEvectortable:
//DisableCPUinterrupts
DINT;
//InitializethePIEcontrolregisterstotheirdefaultstate.
//ThedefaultstateisallPIEinterruptsdisabledandflags
//arecleared.
//ThisfunctionisfoundintheDSP2833x_PieCtrl.cfile.
InitPieCtrl（）;
//DisableCPUinterruptsandclearallCPUinterruptflags:
IER=0x0000;
IFR=0x0000;
//InitializethePIEvectortablewithpointerstotheshellInterrupt
//ServiceRoutines（ISR）.
//Thiswillpopulatetheentiretable,eveniftheinterrupt
//isnotusedinthisexample.Thisisusefulfordebugpurposes.
//TheshellISRroutinesarefoundinDSP2833x_DefaultIsr.c.
//ThisfunctionisfoundinDSP2833x_PieVect.c.
InitPieVectTable（）;
//Interruptsthatareusedinthisexamplearere-mappedto
//ISRfunctionsfoundwithinthisfile.
EALLOW;
//ThisisneededtowritetoEALLOWprotectedregisters
PieVectTable.EPWM1_INT=&
svpwm_isr;
//PieVectTable.EPWM2_INT=&
epwm2_isr;
//PieVectTable.EPWM3_INT=&
epwm3_isr;
EDIS;
//ThisisneededtodisablewritetoEALLOWprotectedregisters
//Step4.InitializealltheDevicePeripherals:
//ThisfunctionisfoundinDSP2833x_InitPeripherals.c
//InitPeripherals（）;
//Notrequiredforthisexample
//Forthisexample,onlyinitializetheePWM
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC=0;
InitEPwm1Example（）;
InitEPwm2Example（）;
InitEPwm3Example（）;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC=1;
//Step5.Userspecificcode,enableinterrupts:
//EnableCPUINT3whichisconnectedtoEPWM1-3INT:
IER|=M_INT3;
//EnableEPWMINTninthePIE:
Group3interrupt1-3
PieCtrlRegs.PIEIER3.bit.INTx1=1;
//PieCtrlRegs.PIEIER3.bit.INTx2=1;
//PieCtrlRegs.PIEIER3.bit.INTx3=1;
//EnableglobalInterruptsandhigherpriorityreal-timedebugevents:
EINT;
//EnableGlobalinterruptINTM
ERTM;
//EnableGlobalrealtimeinterruptDBGM
//Step6.IDLEloop.Justsitandloopforever（optional）:
for（;
;
）
{
asm（"
NOP"
）;
}
}//main结束
//=======================================================================
interruptvoidsvpwm_isr（void）
svpwmGen（）;
//SetComparevalues
EPwm1Regs.CMPA.half.CMPA=Taon;
//adjustdutyforoutputEPWM1A
EPwm2Regs.CMPA.half.CMPA=Tbon;
//adjustdutyforoutputEPWM2A
EPwm3Regs.CMPA.half.CMPA=Tcon;
//adjustdutyforoutputEPWM3A
//ClearINTflagforthistimer
EPwm1Regs.ETCLR.bit.INT=1;
//Acknowledgethisinterrupttoreceivemoreinterruptsfromgroup3
PieCtrlRegs.PIEACK.all=PIEACK_GROUP3;
}
voidInitEPwm1Example（）
//SetupTBCLK
EPwm1Regs.TBPRD=TPRD;
//TPRD=800,Period=1600TBCLKcounts
EPwm1Regs.TBPHS.half.TBPHS=0;
//SetPhaseregistertozero
EPwm1Regs.TBCTR=0x0000;
//Clearcounter
//Setupcountermode
EPwm1Regs.TBCTL.bit.CTRMODE=TB_COUNT_UPDOWN;
//Symmetricalmode
EPwm1Regs.TBCTL.bit.PHSEN=TB_DISABLE;
//////////////////////////Mastermodule
EPwm1Regs.TBCTL.bit.PRDLD=TB_SHADOW;
EPwm1Regs.TBCTL.bit.SYNCOSEL=TB_CTR_ZERO;
/////////////////////Syncdown-streammodule
//SetupTpwm
EPwm1Regs.TBCTL.bit.HSPCLKDIV=TB_DIV2;
//ClockratiotoSYSCLKOUT
EPwm1Regs.TBCTL.bit.CLKDIV=5;
//原为TB_DIV1，对于上下计数：
Tpwm=2xTBPRDxTTBCLKFpwm=1/（Tpwm）
//Setupshadowing
EPwm1Regs.CMPCTL.bit.SHDWAMODE=CC_SHADOW;
EPwm1Regs.CMPCTL.bit.SHDWBMODE=CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE=CC_CTR_ZERO;
//loadonCTR=Zero
EPwm1Regs.CMPCTL.bit.LOADBMODE=CC_CTR_ZERO;
//Setactions
EPwm1Regs.AQCTLA.bit.CAU=AQ_SET;
//setactionsforEPWM1A
EPwm1Regs.AQCTLA.bit.CAD=AQ_CLEAR;
//SetDead-band
EPwm1Regs.DBCTL.bit.OUT_MODE=DB_FULL_ENABLE;
//enableDead-bandmodule
EPwm1Regs.DBCTL.bit.POLSEL=DB_ACTV_HIC;
//ActiveHicomplementary
EPwm1Regs.DBFED=50;
//FED=50TBCLKs
EPwm1Regs.DBRED=50;
//RED=50TBCLKs
//InterruptwherewewillchangetheCompareValues
EPwm1Regs.ETSEL.bit.INTSEL=ET_CTR_ZERO;
//SelectINTonZeroevent
EPwm1Regs.ETSEL.bit.INTEN=1;
//EnableINT
EPwm1Regs.ETPS.bit.INTPRD=ET_3RD;
//GenerateINTon3rdevent
/*
//==============================================================
EPwm1Regs.CMPA.half.CMPA=500;
EPwm2Regs.CMPA.half.CMPA=600;
EPwm3Regs.CMPA.half.CMPA=700;
*/
voidInitEPwm2Example（）
EPwm2Regs.TBPRD=TPRD;
EPwm2Regs.TBPHS.half.TBPHS=0;
EPwm2Regs.TBCTR=0x0000;
EPwm2Regs.TBCTL.bit.CTRMODE=TB_COUNT_UPDOWN;
EPwm2Regs.TBCTL.bit.PHSEN=TB_ENABLE;
//////////////////////////////Slavemodule
EPwm2Regs.TBCTL.bit.PRDLD=TB_SHADOW;
EPwm2Regs.TBCTL.bit.SYNCOSEL=TB_SYNC_IN;
///////////////////////////syncflow-through
EPwm2Regs.TBCTL.bit.HSPCLKDIV=TB_DIV2;
EPwm2Regs.TBCTL.bit.CLKDIV=5;
//ForUpandDownCount--Tpwm=2xTBPRDxTTBCLK;
Fpwm=1/（Tpwm）
//Setupshadowing
EPwm2Regs.CMPCTL.bit.SHDWAMODE=CC_SHADOW;
EPwm2Regs.CMPCTL.bit.SHDWBMODE=CC_SHADOW;
EPwm2Regs.CMPCTL.bit.LOADAMODE=CC_CTR_ZERO;
EPwm2Regs.CMPCTL.bit.LOADBMODE=CC_CTR_ZERO;
EPwm2Regs.AQCTLA.bit.CAU=AQ_SET;
//setactionsforEPWM2A
EPwm2Regs.AQCTLA.bit.CAD=AQ_CLEAR;
EPwm2Regs.DBCTL.bit.OUT_MODE=DB_FULL_ENABLE;
EPwm2Regs.DBCTL.bit.POLSEL=DB_ACTV_HIC;
EPwm2Regs.DBFED=50;
EPwm2Regs.DBRED=50;
EPwm2Regs.ETSEL.bit.INTSEL=ET_CTR_ZERO;
EPwm2Regs.ETSEL.bit.INTEN=1;
EPwm2Regs.ETPS.bit.INTPRD=ET_3RD;
voidInitEPwm3Example（）
EPwm3Regs.TBPRD=TPRD;
EPwm3Regs.TBPHS.half.TBPHS=0;
EPwm3Regs.TBCTL.bit.CTRMODE=TB_COUNT_UPDOWN;
EPwm3Regs.TBCTL.bit.PHSEN=TB_ENABLE;
////////////////////////////////Slavemodule
EPwm3Regs.TBCTL.bit.PRDLD=TB_SHADOW;
EPwm3Regs.TBCTL.bit.SYNCOSEL=TB_SYNC_IN;
//////////////////////////////syncflow-through
EPwm3Regs.TBCTL.bit.HSPCLKDIV=TB_DIV2;
EPwm3Regs.TBCTL.bit.CLKDIV=5;
//ForUpandDownCount:
Tpwm=2xTBPRDxTTBCLK;
EPwm3Regs.CMPCTL.bit.SHDWAMODE=CC_SHADOW;
EPwm3Regs.CMPCTL.bit.SHDWBMODE=CC_SHADOW;
EPwm3Regs.CMPCTL.bit.LOADAMODE=CC_CTR_ZERO;
EPwm3Regs.CMPCTL.bit.LOADBMODE=CC_CTR_ZERO;
EPwm3Regs.AQCTLA.bit.CAU=AQ_SET;
//setactionsforEPWM3A
EPwm3Regs.AQCTLA.bit.CAD=AQ_CLEAR;
EPwm3Regs.DBCTL.bit.OUT_MODE=DB_FULL_ENABLE;
EPwm3Regs.DBCTL.bit.POLSEL=DB_ACTV_HIC;
EPwm3Regs.DBFED=50;
EPwm3Regs.DBRED=50;
EPwm3Regs.ETSEL.bit.INTSEL=ET_CTR_ZERO;
EPwm3Regs.ETSEL.bit.INTEN=1;
EPwm3Regs.ETPS.bit.INTPRD=ET_3RD;
voidsvpwmGen（void）
{
//clarke
Ualpha=0.6666667*（Ua-0.5*Ub-0.5*Uc）;
//0.8660254=sqrt（3）/2
Ubeta=0.6666667*（0.8660254*Ub-0.8660254*Uc）;
//0.6666667=2/3
//sector
A=Ubeta;
B=1.7320508*Ualpha-Ubeta;
C=-1.7320508*Ualpha-Ubeta;
if（A>
=0）{a=1;
}elsea=0;
if（B>
=0）{b=1;
}elseb=0;
if（C>
=0）{c=1;
}elsec=0;
N=a+2*b+4*c;
switch（N）
case1:
sector=2;
break;
case2:
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