svpwm源程序Word文件下载.docx

1、#include DSP28x_Project.h / Device Headerfile and Examples Include File/ Prototype statements for functions found within this file.void InitEPwm1Example（void）;void InitEPwm2Example（void）;void InitEPwm3Example（void）;void svpwmGen（void）;interrupt void svpwm_isr（void）;volatile float Ualpha,Ubeta;volati

2、le float A,B,C;volatile float T0,T1,T2,T3,T4,T5,T6;volatile float Taon,Tbon,Tcon;float Ua,Ub,Uc;float Ts;int a,b,c;int N= 0,sector= 0;#define TPRD 800#define Udc 800void main（void）/ Step 1. Initialize System Control:/ PLL, WatchDog, enable Peripheral Clocks/ This example function is found in the DSP

3、2833x_SysCtrl.c file. InitSysCtrl（）;/ Step 2. Initalize GPIO: / This example function is found in the DSP2833x_Gpio.c file and/ illustrates how to set the GPIO to its default state./ InitGpio（）; / Skipped for this example / For this case just init GPIO pins for ePWM1, ePWM2, ePWM3/ These functions a

4、re in the DSP2833x_EPwm.c file InitEPwm1Gpio（）; InitEPwm2Gpio（）; InitEPwm3Gpio（）;/ Step 3. Clear all interrupts and initialize PIE vector table:/ Disable CPU interrupts DINT;/ Initialize the PIE control registers to their default state./ The default state is all PIE interrupts disabled and flags/ ar

5、e cleared. / This function is found in the DSP2833x_PieCtrl.c file. InitPieCtrl（）;/ Disable CPU interrupts and clear all CPU interrupt flags: IER = 0x0000; IFR = 0x0000;/ Initialize the PIE vector table with pointers to the shell Interrupt / Service Routines （ISR）. / This will populate the entire ta

6、ble, even if the interrupt/ is not used in this example. This is useful for debug purposes./ The shell ISR routines are found in DSP2833x_DefaultIsr.c./ This function is found in DSP2833x_PieVect.c. InitPieVectTable（）;/ Interrupts that are used in this example are re-mapped to/ ISR functions found w

7、ithin this file. EALLOW; / This is needed to write to EALLOW protected registers PieVectTable.EPWM1_INT = &svpwm_isr; /PieVectTable.EPWM2_INT = &epwm2_isr; /PieVectTable.EPWM3_INT = &epwm3_isr; EDIS; / This is needed to disable write to EALLOW protected registers/ Step 4. Initialize all the Device P

8、eripherals:/ This function is found in DSP2833x_InitPeripherals.c/ InitPeripherals（）; / Not required for this example/ For this example, only initialize the ePWM SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0; InitEPwm1Example（）; InitEPwm2Example（）; InitEPwm3Example（）; SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;/

9、 Step 5. User specific code, enable interrupts:/ Enable CPU INT3 which is connected to EPWM1-3 INT: IER |= M_INT3;/ Enable EPWM INTn in the PIE: Group 3 interrupt 1-3 PieCtrlRegs.PIEIER3.bit.INTx1 = 1; /PieCtrlRegs.PIEIER3.bit.INTx2 = 1; /PieCtrlRegs.PIEIER3.bit.INTx3 = 1;/ Enable global Interrupts

10、and higher priority real-time debug events: EINT; / Enable Global interrupt INTM ERTM; / Enable Global realtime interrupt DBGM / Step 6. IDLE loop. Just sit and loop forever （optional）: for（;） asm（ NOP）; /main结束 /=interrupt void svpwm_isr（void）svpwmGen（）;/ Set Compare valuesEPwm1Regs.CMPA.half.CMPA

11、= Taon; / adjust duty for output EPWM1AEPwm2Regs.CMPA.half.CMPA = Tbon; / adjust duty for output EPWM2AEPwm3Regs.CMPA.half.CMPA = Tcon; / adjust duty for output EPWM3A/ Clear INT flag for this timerEPwm1Regs.ETCLR.bit.INT = 1;/ Acknowledge this interrupt to receive more interrupts from group 3PieCtr

12、lRegs.PIEACK.all = PIEACK_GROUP3;void InitEPwm1Example（）/ Setup TBCLKEPwm1Regs.TBPRD = TPRD; / TPRD=800,Period = 1600 TBCLK countsEPwm1Regs.TBPHS.half.TBPHS = 0; / Set Phase register to zeroEPwm1Regs.TBCTR = 0x0000; / Clear counter/ Setup counter modeEPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;/ S

13、ymmetrical modeEPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; /Master moduleEPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; / Sync down-stream module/ Setup TpwmEPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV2; / Clock ratio to SYSCLKOUTEPwm1Regs.TBCTL.bit.CLKDIV = 5; /原为TB_DIV1， 对

14、于上下计数：Tpwm = 2 x TBPRD x TTBCLK Fpwm = 1 / （Tpwm）/Setup shadowingEPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; / load on CTR=ZeroEPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;/ Set actionsEPwm1Regs.AQCTLA.bit.CAU =

15、AQ_SET; / set actions for EPWM1AEPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR;/ Set Dead-bandEPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE; / enable Dead-band moduleEPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; / Active Hi complementaryEPwm1Regs.DBFED = 50; / FED = 50 TBCLKsEPwm1Regs.DBRED = 50; / RED = 50 TBCLKs

16、/ Interrupt where we will change the Compare ValuesEPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; / Select INT on Zero eventEPwm1Regs.ETSEL.bit.INTEN = 1; / Enable INTEPwm1Regs.ETPS.bit.INTPRD = ET_3RD; / Generate INT on 3rd event /*/=EPwm1Regs.CMPA.half.CMPA = 500;EPwm2Regs.CMPA.half.CMPA = 600;EPwm3Reg

17、s.CMPA.half.CMPA = 700;*/void InitEPwm2Example（）EPwm2Regs.TBPRD = TPRD;EPwm2Regs.TBPHS.half.TBPHS = 0;EPwm2Regs.TBCTR = 0x0000;EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE; / Slave moduleEPwm2Regs.TBCTL.bit.PRDLD = TB_SHADOW;EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SY

18、NC_IN; / sync flow-throughEPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV2;EPwm2Regs.TBCTL.bit.CLKDIV = 5; / For Up and Down Count-Tpwm = 2 x TBPRD x TTBCLK; Fpwm = 1 / （Tpwm）/ Setup shadowingEPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;EPwm2Regs.CMPCTL.bit.LOADAMODE

19、= CC_CTR_ZERO;EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;EPwm2Regs.AQCTLA.bit.CAU = AQ_SET; / set actions for EPWM2AEPwm2Regs.AQCTLA.bit.CAD = AQ_CLEAR;EPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;EPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;EPwm2Regs.DBFED = 50;EPwm2Regs.DBRED = 50;EPwm2Regs.ETSEL.b

20、it.INTSEL = ET_CTR_ZERO;EPwm2Regs.ETSEL.bit.INTEN = 1;EPwm2Regs.ETPS.bit.INTPRD = ET_3RD;void InitEPwm3Example（）EPwm3Regs.TBPRD = TPRD;EPwm3Regs.TBPHS.half.TBPHS = 0;EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;EPwm3Regs.TBCTL.bit.PHSEN = TB_ENABLE; / Slave moduleEPwm3Regs.TBCTL.bit.PRDLD = TB_SHAD

21、OW;EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; / sync flow-throughEPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV2;EPwm3Regs.TBCTL.bit.CLKDIV = 5; / For Up and Down Count:Tpwm = 2 x TBPRD x TTBCLK;EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;EPwm3Regs.CMPCTL.bit.LOADAM

22、ODE = CC_CTR_ZERO;EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;EPwm3Regs.AQCTLA.bit.CAU = AQ_SET; / set actions for EPWM3AEPwm3Regs.AQCTLA.bit.CAD = AQ_CLEAR;EPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;EPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;EPwm3Regs.DBFED = 50;EPwm3Regs.DBRED = 50;EPwm3Regs.ETS

23、EL.bit.INTSEL = ET_CTR_ZERO;EPwm3Regs.ETSEL.bit.INTEN = 1;EPwm3Regs.ETPS.bit.INTPRD = ET_3RD;void svpwmGen（void） /clarke Ualpha= 0.6666667*（Ua-0.5*Ub-0.5*Uc）;/ 0.8660254 = sqrt（3）/2 Ubeta = 0.6666667*（0.8660254*Ub-0.8660254*Uc ）;/0.6666667=2/3/sector A= Ubeta; B= 1.7320508*Ualpha-Ubeta; C= -1.7320508*Ualpha-Ubeta; if（A= 0） a= 1; else a= 0; if（B= 0） b= 1; else b= 0; if（C= 0） c= 1; else c= 0; N=a+2*b+4*c; switch（N） case 1: sector = 2; break; case 2: