FPGA Based PID Controller Implementation文献翻译Word下载.docx

FPGA Based PID Controller Implementation文献翻译Word下载.docx

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TheIslamicUniversityofGaza

Gaza,Palestine

Abstract:

Proportional-Integral-Derivative（PID）controllersarewidelyusedinautomationsystems.Theyareusuallyimplementedeitherinhardwareusinganalogcomponentsorinsoftwareusingcomputer-basedsystems.TheymayalsobeimplementedusingApplicationSpecificIntegratedCircuits（ASICs）.ThispaperoutlinesseveralmodulesnecessaryforbuildingPIDcontrollersonFieldProgrammableGateArrays（FPGAs）whichimprovespeed,accuracy,power,compactness,andcosteffectiveness.TwoPIDcontrollersforspeedandpositionutilizingthesemodulesareimplementedandusedasexperimentalplatformstoillustrateandtestthedesignedmodules.

1Introduction

Therearetwoapproachesforimplementingcontrolsystemsusingdigitaltechnology.Thefirstapproachisbasedonsoftwarewhichimpliesamemory-processorinteraction.Thememoryholdstheapplicationprogramwhiletheprocessorfetches,decodes,andexecutestheprograminstructions.ProgrammableLogicControllers（PLCs）,microcontrollers,microprocessors,DigitalSignalProcessors（DSPs）,andgeneralpurposecomputersaretoolsforsoftwareimplementation.

Ontheotherhand,thesecondapproachisbasedonhardware.Earlyhardwareimplementationisachievedbymagneticrelaysextensivelyusedinoldindustryautomationsystems.ItthenbecameachievablebymeansofdigitallogicgatesandMediumScaleIntegration（MSI）components.Whenthesystemsizeandcomplexityincreases,ApplicationSpecificIntegratedCircuits（ASICs）areutilized.TheASICmustbefabricatedonamanufacturingline,aprocessthattakesseveralmonths,beforeitcanbeusedoreventested.FPGAsareconfigurableICsandusedtoimplementlogicfunctions.EarlygenerationsofFPGAsweremostoftenusedasgluelogicwhichisthelogicneededtoconnectthemajorcomponentsofasystem.Theywereoftenusedinprototypesbecausetheycouldbeprogrammedandinsertedintoaboardinafewminutes,buttheydidnotalwaysmakeitintothefinalproduct.Today’shigh-endFPGAscanholdseveralmillionsgatesandhavesomesignificantadvantagesoverASICs.Theyensureeaseofdesign,lowerdevelopmentcosts,moreproductrevenue,andtheopportunitytospeedproductstomarket.Atthesametimetheyaresuperiortosoftware-basedcontrollersastheyaremorecompact,power-efficient,whileaddinghighspeedcapabilities.

ThetargetFPGAdeviceusedinthisresearchisSpartan-3manufacturedrecentlybyXilinx.Designdevelopmentanddebuggingiscarriedonalow-cost,fullfeaturedkitprovidedbyDigilent.Thisboard,whichcostslessthana100$,providesallthetoolsrequiredtoquicklybegindesigningandverifyingSpartan-3platformdesigns.WhiletheimplementedmodulesarealsosuitedtootherhighdensityFPGAs,designsarebasedon50MHzclockandshouldbeupdatedifdifferentfrequencyisused.

Incontrolsystems,themajorityofactuatingsignalsandsensorreturnsareanalogsignals.Therefore,analogtodigitalanddigitaltoanalogconversionplaysanimportantroleindigitalcontrollers.Theseconvertersarelocatedattheboundaryofthedigitalcontroller.Usuallytherearesomemoduleswithinthedigitalsystemthatfacilitatecommunicationwiththeseconverters.Inaddition,digitalcontrollersusuallyencompassinput/output（I/O）modulestocommunicatewithusers.Pushbuttonsandsevensegmentdisplaysarewellsuitedtosmallsizeandcompactcontrollers.Alongwiththesefourmentionedbuildingblocksapulsewidthmodulation（PWM）deviceandanopticalencoderinterfaceadapterwillbedesigned.Theyareusedasbuildingblocksinmanycontrolapplicationssuchasspeedandpositioncontrol.Onemorebuildingblockfordigitalfilterswillbeaddressedinthiswork.ItisessentialtoimplementtransferfunctionsinPIDcontrollers.

Therestofthispaperisorganizedasfollows.InSection2relevantworkisaddressed.InSection3,thebuildingblocksareconstructed.InSection4,experimentalworkisdescribed.FinallyinSection5,conclusionsandsuggestionsforfutureworkareoutlined.

2Relevantwork

ModernFPGAsandtheirdistinguishablecapabilitieshavebeenadvertisedextensivelybyFPGAvendors.Moreover,somerefereedarticlesaddressedtheadvantagesofutilizingthesepowerfulchips.Inthepasttwoyears,SpartanIIandIIIFPGAfamiliesfromXilinxhavebeensuccessfullyutilizedinavarietyofapplicationswhichincludeinverters,communications,imbeddedprocessors,andimageprocessing.

TheimplementationofPIDcontrollersusingmicroprocessorsandDSPchipsisoldandwellknown[12][13],whereasverylittleworkcanbefoundintheliteratureonhowtoimplementPIDcontrollersusingFPGAs.TheschemeproposedinisbasedonadistributedarithmeticalgorithmwhereaLook-Up-table（LUT）mechanisminsidetheFPGAisutilized.ThecontributionfocusedonpowerandareaissueswhileFPGAinterfacingistotallyunaddressed.InourworkweintroduceasimplemethodforimplementingPIDcontrollerstogetherwithmanyrelatedconstructingmodules.SomeothercontributionsfocusedonproposingalgorithmsfortuningthecoefficientsofPIDcontrollersusingFPGAswhilethecontrolleritselfisstillimplementedinsoftware.ThesecontributionsareconsideredcomplementarytoourworkastheyprovidetoolsforbuildingadaptivePIDapplications.IntwodifferentalgorithmsforfuzzyPIDgainconditioneralgorithmareproposed.BotharebasedonfuzzycontrolthattunesthePIDcontrolleron-line.

APWMgeneratorisintroducedin.However,onlysimulationresultsarepresentedandtheproposedalgorithmresultsingreaterconsumptionofFPGAresourcescomparedtoouralgorithmwhichistestedexperimentally.However,despiteitscomplexity,thealgorithminissuperiorintermsofharmoniccontentandismoresuitedtoinverterapplications.

Intheauthorsdescribethearchitectureofadataacquisitionsystemforagamma-rayimagingcamera.ThesystemhasbeendesignedbyusingXilinxSpartanIIdevicesand12-bitparallelA/Dconverters.Inourwork,dataacquisitionforthePIDcontroller,whichisimplementedusingXilinxSpartanIII,isbasedon8-bitserialA/Dconverters.Similarconvertersareutilizedin[19]toimplementanadaptablestraingageconditionerusingFPGAs.Whilebeingasmartdataacquisitionapproach,itiscostlyasitisbasedonasoftintellectualproperty（IP）processor.

3PIDbuildingblocks

Inthissection,implementationofanaloginputinterface,analogoutputinterface,pulsewidthmodulation,opticalencoderinterface,userinterface,anddigitalfiltersareintroduced.ThesebuildingblocksarethemajorblocksthatareessentialforimplementingmostPIDcontrollersonFPGAs.

3.1Analoginputinterface

FPGAsarewellsuitedforserialAnalogtoDigital（A/D）converters.ThisismainlyserialinterfaceconsumeslesscommunicationlineswhiletheFPGAisfastenoughtoaccommodatethehighspeedserialdata.TheAD7823isahighspeed,lowpower,8-bitA/Dconverter.Thepartcontainsa4ustypicalsuccessiveapproximationA/DconverterandahighspeedserialinterfacethatinterfaceseasilytoFPGAsasillustratedinFigure1a.

Figure1.A/Dconverterinterfaceandtimingdiagram

TheA/Dinterfaceadapter（ADIA）isimplementedwithintheFPGA.InsidetheFPGA,thisadapterfacilitatesparalleldataacquisition.Samplingisinitiatedattherisingedgeofaclockappliedatthelinesample.Onceconversionandtransmissioniscompleted,apulseisgeneratedattheinterruptline（int）andtheparalleldatawillbeavailableattheDataBus（DB）.ThetimingdiagramofthecommunicationprotocolisillustratedinFigure1b.Thewholeconversionandacquisitionperiodis5.4usallowingsamplinguptoarateof185KiloSamplepersecond.ThisrateismorethansufficientformostPIDcontrolapplications.

3.2Analogoutputinterface

TheAD7303isadual,8-bitvoltageoutDigitaltoAnalog（D/A）converter.Thisdeviveusesaverstile3-wireserialinterfacethatoperatesataclockupto30MHz.Theserialinputregisteris16bitswide;

8bitsactasdatabitsfortheD/Aconverter,andtheremaining8bitsmakeupacontrolregister.ItisinterfacedtoanFPGAasillustratedinFigure2a.

Figure2.D/Aconverterinterfaceandtimingdiagram.

TheD/Ainterfaceadapter（DAIA）,whichisimplementedwithintheFPGA,facilitatesparalleldatainputforthedualD/Aconverters.Alogiczeroonthesynchronizationsignal（SYNC）enablestheshiftregisterattheD/AchiptoreceivedatafromtheDAIA’sserialdataoutput（Sout）.Itsserialclock（SCLK）frequencyis25MHzwhichishalfofthemasterclock（CLK50）frequency.Dataisclockedintotheshiftregisterontherisingedgeoftheserialclockanditissentmostsignificantbit（MSB）first.Eachtransfermustconsistofa16-bitpacketwhichisdescribedinTable1whilethetimingdiagramofthecommunicationprotocolisillustratedinFigure2b.Thetransmissionperiodofasampleis680nsallowingD/Aconversionatanexcellentrateof1.47MHz.

3.3Pulsewidthmodulation

SwitchingpowerconvertersareusedinmostDCmotordrivestodelivertherequiredenergytothemotor.TheenergythataswitchingpowerconverterdeliverstoaDCmotoriscontrolledbyPulseWidthModulated（PWM）signalappliedtothegateofapowertransistor.PWMsignalsarepulsetrainswithfixedfrequencyandmagnitudeandvariablepulsewidth.ThereisonepulseoffixedmagnitudeineveryPulseWidthModulation（PWM）period.However,thewidthofthepulses（dutycycle）changesfrompulsetopulseaccordingtoamodulatingsignalasillustratedinFigure3a.

Table1.Descriptionofthe