lab03.docx

lab03.docx

《lab03.docx》由会员分享，可在线阅读，更多相关《lab03.docx（20页珍藏版）》请在冰豆网上搜索。

lab03

Lab3:

DesigningaFIRFilter

TargetingtheSpartan-3EStarterKit

Introduction

Inthislab,youareshownonewayofspecifying,simulating,andimplementingaFIRfilterusingtheSystemGenerator’sFIRandFDAToolblocks.TheFDAToolblockisusedtodefinethefilterorderandcoefficients,andtheFIRblockisusedfortheSimulinksimulationanddesignimplementationinFPGAusingXilinxISE.Youarealsoabletoverifythefunctionalityofthedesignbyrunningitthroughtheactualhardware.

Note:

Therearecompletedexamplesinc:

\xup\dsp_flow\labs\labsolutions\lab3\.

Objectives

Aftercompletingthislab,youwillbeableto:

∙EnteryourfiltercharacteristicsusingFDAToolblockandusethegeneratedcoefficientsinthedesignorsaveitintheworkspace

∙UsetheFIRblockwiththecoefficientsgeneratedbytheFDAToolblock,andrunabit-truesimulationinSimulink

∙GeneratethedesignandestimatetheresourceutilizationusingtheResourceEstimatorblockandpost-mapreport

DesignDescription

YouareDSPDesigneratCyberdyneSystems.YourcompanyisinvestigatingusingDigitalFiltersinsteadofanalogforitsSecurityTagdetectorsinanattempttoimproveperformanceandreducecostoftheoverallsystem.Thiswillenablethecompanytofurtherpenetratethegrowingsecuritymarketspace.Thespecificationofthesinglechannel,singleratefilterisspecifiedbelow:

∙SamplingFrequency（Fs）=1.5MHz

∙Fstop1=270kHz

∙Fpass1=300kHz

∙Fpass2=450khz

∙Fstop2=480kHz

∙Attenuationonbothsidesofthepassband=54dB

∙Passbandripple=1

CyberdynehaschosentogowithFPGAsduetotheirflexibilityandtimetomarketandperformanceadvantagesoverDSPProcessors.YourHDLdesignexperienceislimitedandhenceSystemGeneratorforDSPappearstobeanexcellentsolutionforimplementingthefilterinanFPGA,asyouarealreadyfamiliarwithTheMathWorksproducts.

Yourmanager,MilesBooth,hasrequestedthatyoucreateaprototypeofthefiltertobeimplementedontheirSpartan-3E™prototypeboardthatisalmostcomplete.TheprototypemustbefinishedasquicklyaspossiblefortheimminentAggressiveSecurityconvention,whichistheindustry’slargestconventionoftheyear,soitmustnotbemissed.

Yourmanagerhasprovidedastartingmodelthatincludesinputsourcesandoutputsink.YourdesignmustbesimulatedusingaRandomSourceandthechirpfromtheDSPBlockset.Toanalyzetheoutputofthefilter,inputandoutputsignalsaredisplayedinaspectrumscope.Aspectrumscopeisusedtocomparethefrequencyresponseofthefixed-pointFIRfilter,whichwillbeimplementedintheFPGA.

Twodifferentsourcesareusedtosimulatethefilter:

∙Thechirpblock,whichsweepsbetweenthespecifiedfrequenciesof6KHzand10KHzwithoutregardfortheinstantaneousoutputfrequency

∙Therandomsourcegenerator,whichoutputsarandomsignalofuniformdistributionwitharangeof-1.9to1.9.Uniformisabetterchoicetodriveafixed-pointfilterbecauseitisbounded.

Procedure

Thislabcomprisessixprimarysteps.YouwillstartwithgeneratingcoefficientsforaspecifiedFIRfilterusingSystemGenerator’sFDAToolblockinStep1.InStep2,youwillassociatethecoefficientstotheFIRfilterblock.Step3requiresyoutosimulatethedesignusingtwoprovidedsourcesandanalyzestheeffectofcoefficientandinputwidthchanges.InStep4,youwillcompletethedesignbyaddingaConvertblocktoadjusttheoutputwidth,addingaDelayblocktoimprovetheefficiency,andbyaddingaResourceEstimatorblocktoestimateresources.Next,thedesignisimplementedwithbaselinespecificationsinStep6.Beloweachgeneralinstructionforagivenprocedure,youwillfindaccompanyingstep-by-stepdirectionsandillustratedfiguresprovidingmoredetailforperformingthegeneralinstruction.Ifyoufeelconfidentaboutaspecificinstruction,feelfreetoskipthestep-by-stepdirectionsandmoveontothenextgeneralinstructionintheprocedure.

Note:

Ifyouareunabletocompletethelabatthistime,youcandownloadthelabfilesforthismodulefromtheXilinxUniversityProgramsiteat

GenerateCoefficientsfortheFIRFilterStep1

GeneralFlowforthisLab:

Step4:

CompletetheDesign

Step3:

SimulatetheFilter

Step2:

AssociateCoefficientstoFilter

Step1:

GenerateFilterCoefficients

Step7:

PerformHW-in-the-LoopVerification

Step5:

ImplementDesign

Step6:

EstimateResources

AddtheFDAToolblockfromtheXilinxBlocksetDSPblocksettoadesigncontainingaDAFIRfilter.GeneratecoefficientsfortheFIRfilterintheusingtheFDAToolblockforthefollowingspecifications

∙SamplingFrequency（Fs）=1.5MHz

∙Fstop1=270KHz

∙Fpass1=300KHz

∙Fpass2=450Khz

∙Fstop2=480KHz

∙Attenuationonbothsidesofthepassband=54dB

∙Passbandripple=1

❶InMatlab,changedirectorytoc:

/xup/dsp_flow/labs/lab3/:

Typecdc:

/xup/dsp_flow/labs/lab3/inthecommandwindow.

❷Openthebandpass_filter.mdlmodelfromtheMATLABconsolewindow

❸AddtheFDAToolblockbyfromXilinxBlocksetDSPtothedesign

❹EnterthefollowingfilterparametersintheFDAToolDesignFilterwindow（Figure2-1）

∙ResponseType:

Bandpass

∙Units:

KHz

∙SamplingFrequency（Fs）=1.5MHz

∙Fstop1=270KHz

∙Fpass1=300KHz

∙Fpass2=450Khz

∙Fstop2=480KHz

∙Attenuationonbothsidesofthepassband=54dB（Astop1andAstop2parameters）

∙Passbandripple=1（Apass）

Figure3-1.DesignaFilterinFDATool.

❺ClicktheDesignFilterbuttontodeterminethefilterorder

ThespectrumwindowwillbeupdatedandwilllooklikeasshowninFigure3-2

Figure3-2.DesignedFilter’sMagnitudeResponse.

1.Basedonthedefinedspecifications,whatistheminimumfilterorder?

❻Savethecoefficientsincoefficients.fda,fda-format,fileusingFileSaveSession

Note:

Thisisanoptionalstep.Thecoefficientsarestillavailabletothedesign.Ifyousavethecoefficientsinfda-filethentheycanbeloadedlaterthroughtheFDAToolblockparametersdialogbox.

❼ExportthecoefficientsintheWorkspacewithNumeratorvariablenameasNum（Figure3-3）usingFileExport

Note:

ThiswilladdNumvariableinyourMATLABworkspace.ForaFIRfilter,Numrepresentscoefficientsthatareusedinthefilter.ThisisalsoanoptionalstepasthecoefficientsarestillavailablethroughtheFDAToolblock

Figure3-3.ExportingCoefficientsintheWorkspace.

❽TypeNumintheMATLABconsolewindowtoseethelistofcoefficients

❾Typemax（Num）intheMATLABconsolewindowtodeterminethemaximumcoefficientvaluethatadequatelyspecifiesthecoefficientwidthandbinarypoint

2.Fillinfollowinginformationrelatedtothecoefficients

Maximumvalue:

____________________

Minimumvalue:

AssociatetheCoefficientstotheFIRFilterStep2

GeneralFlowforthisLab:

Step4:

CompletetheDesign

Step3:

SimulatetheFilter

Step2:

AssociateCoefficientstoFilter

Step1:

GenerateFilterCoefficients

Step7:

PerformHW-in-the-LoopVerification

Step5:

ImplementDesign

Step6:

EstimateResources

AddtheFIRfilterblockfromtheXilinxBlocksetDSPlibraryandassociatethegeneratedcoefficients

❶AddtheFIR（DAFIRv9_0）filterblockfromtheXilinxBlocksetDSPlibrarytothedesign

Double-clicktheXilinxFIRFilterblockandenterthefollowingparametersintheblockparameterwindow（Figure3-4）

∙Coefficients:

xlfda_numerator（‘FDATool’）

∙CoefficientStructure:

InferredfromCoefficients

∙NumberofbitsperCoefficients:

12

∙BinaryPointforCoefficients:

11

∙ProvideValidPorts:

unchecked

Figure3-4.FIRFilterBlockParameters.

❸ClickOKtoacceptthesettings

❹ConnecttheblockstohavethedesignresembletoFigure3-5

Figure3-5.FIRFilterBlockBasedDesignReadyforSimulation.

SimulatetheFIRFilterinSimulinkStep3

GeneralFlowforthisLab:

Step4:

CompletetheDesign

Step3:

SimulatetheFilter

Step2:

AssociateCoefficientstoFilter

Step1:

GenerateFilterCoefficients

Step7:

PerformHW-in-the-LoopVerification

Step5:

ImplementDesign

Step6:

EstimateResources

SetthesampleinputtoFIX_8_6andinputsampleperiodto1/1500000.UsingSpectrumScope,studytheoutputforthechirpandnoisesignals.

❶Double-clicktheGatewayInblockandsettheformattoFIX_8_6andsamplingperiodto1/1500000

❷SelecttheChirpSourceandstartthesimulation

Ifyoureceivethefollowingerror,updatethelatencyoftheFIRaccordingtothemessage,and

thenre-simulate.

❸BringthescopetothefrontandverifythatthesignalcomingoutoftheFIRfilterhasbeenattenuatedandtheylooklikeFigure3-7andFigure3-8,below.

Figure3-7.NoAttenuationinPassband（SpectrumScope）.

Figure3-8.AttenuationinStopband（SpectrumScope）.

❹Stopthesimulation

❺SelecttheRandomSourceandrunthesimulation

Figure3-10.RandomSource（SpectrumScope）.

❻Stopthesimulation

CompletetheFIRFilterDesignStep4

GeneralFlowforthisLab:

Step4:

CompletetheDesign

Step3:

SimulatetheFilter

Step2:

AssociateCoefficientstoFilter

Step1:

GenerateFilterCoefficients

Step7:

PerformHW-in-the-LoopVerification

Step5:

ImplementDesign

Step6:

EstimateResources

AddtheconvertblocktogetFIX_8_6outputtoreducethedynamicrangerequiredfordisplay.Addadelayelementtoimprovetheperformance.UsetheResourceEstimatorblocktoestimatetherequiredresourcesforthedesign.

❶AddaConvertblockfromtheXilinxBlocksetBasicElementslibraryontheFIRoutputtomaketheoutpu