AT89C52DATASHEETS 中文版.docx

AT89C52DATASHEETS 中文版.docx

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AT89C52DATASHEETS中文版

AT89C52Datasheets

Features

•CompatiblewithMCS-51™Products

•8KBytesofIn-SystemReprogrammableFlashMemory

–Endurance:

1,000Write/EraseCycles

•FullyStaticOperation:

0Hzto24MHz

•Three-LevelProgramMemoryLock

•256x8-BitInternalRAM

•32ProgrammableI/OLines

•Three16-BitTimer/Counters

•EightInterruptSources

•ProgrammableSerialChannel

•LowPowerIdleandPowerDownModes

Description

TheAT89C52isalow-power,high-performanceCMOS8-bitmicrocomputerwith8KbytesofFlashprogrammableanderasablereadonlymemory（PEROM）.ThedeviceismanufacturedusingAtmel’shighdensitynonvolatilememorytechnologyandiscompatiblewiththeindustrystandard80C51and80C52instructionsetandpinout.Theon-chipFlashallowstheprogrammemorytobereprogrammedin-systemorbyaconventionalnonvolatilememoryprogrammer.Bycombiningaversatile8-bitCPUwithFlashonamonolithicchip,theAtmelAT89C52isapowerfulmicrocomputerwhichprovidesahighlyflexibleandcosteffectivesolutiontomanyembeddedcontrolapplications.

TheAT89C52providesthefollowingstandardfeatures:

8KbytesofFlash,256bytesofRAM,32I/Olines,three16-bittimer/counters,asix-vectortwo-levelinterruptarchitecture,afullduplexserialport,on-chiposcillator,andclockcircuitry.Inaddition,theAT89C52isdesignedwithstaticlogicforoperationdowntozerofrequencyandsupportstwosoftwareselectablepowersavingmodes.TheIdleModestopstheCPUwhileallowingtheRAM,timer/counters,serialport,andinterruptsystemtocontinuefunctioning.ThePowerDownModesavestheRAMcontentsbutfreezestheoscillator,disablingallotherchipfunctionsuntilthenexthardwarereset.

PinDescription

VCC

Supplyvoltage.

GND

Ground.

Port0

Port0isan8-bitopendrainbidirectionalI/Oport.Asanoutputport,eachpincansinkeightTTLinputs.When1sarewrittentoport0pins,thepinscanbeusedashighimpedance

inputs.Port0canalsobeconfiguredtobethemultiplexedloworderaddress/databusduringaccessestoexternalprogramanddatamemory.Inthismode,P0hasinternalpullups.Port0alsoreceivesthecodebytesduringFlashprogrammingandoutputsthecodebytesduringprogramverification.Externalpullupsarerequiredduringprogramverification.

Port1

Port1isan8-bitbidirectionalI/Oportwithinternalpullups.ThePort1outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort1pins,theyarepulledhighbytheinternalpullupsandcanbeusedasinputs.Asinputs,Port1pinsthatareexternallybeingpulledlowwillsourcecurrent（IIL）becauseoftheinternalpullups.Inaddition,P1.0andP1.1canbeconfiguredtobethetimer/counter2externalcountinput（P1.0/T2）andthetimer/counter2triggerinput（P1.1/T2EX）,respectively,asshowninthefollowingtable.

Port1alsoreceivesthelow-orderaddressbytesduringFlashprogrammingandverification.

Port2

Port2isan8-bitbidirectionalI/Oportwithinternalpullups.ThePort2outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort2pins,theyarepulledhighbytheinternalpullupsandcanbeusedasinputs.Asinputs,Port2pinsthatareexternallybeingpulledlowwillsourcecurrent（IIL）becauseoftheinternalpullups.Port2emitsthehigh-orderaddressbyteduringfetchesfromexternalprogrammemoryandduringaccessestoexternaldatamemorythatuse16-bitaddresses.Inthisapplication,Port2usesstronginternalpull-upswhenemitting1s.Duringaccessestoexternaldatamemorythatuse8-bitaddresses,Port2emitsthecontentsoftheP2SpecialFunctionRegister.Port2alsoreceivesthehigh-orderaddressbitsandsomecontrolsignalsduringFlashprogrammingandverification.

Port3

Port3isan8-bitbidirectionalI/Oportwithinternalpullups.

ThePort3outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort3pins,theyarepulledhighbytheinternalpullupsandcanbeusedasinputs.Asinputs,

Port3pinsthatareexternallybeingpulledlowwillsourcecurrent（IIL）becauseofthepullups.

Port3alsoservesthefunctionsofvariousspecialfeaturesoftheAT89C51,asshowninthefollowingtable.

Port3alsoreceivessomecontrolsignalsforFlashprogrammingandverification.

RST

Resetinput.Ahighonthispinfortwomachinecycleswhiletheoscillatorisrunningresetsthedevice.

ALE/PROG

AddressLatchEnableisanoutputpulseforlatchingthelowbyteoftheaddressduringaccessestoexternalmemory.Thispinisalsotheprogrampulseinput（PROG）during

Flashprogramming.Innormaloperation,ALEisemittedataconstantrateof1/6theoscillatorfrequencyandmaybeusedforexternaltimingorclockingpurposes.Note,however,thatoneALEpulseisskippedduringeachaccesstoexternaldatamemory.Ifdesired,ALEoperationcanbedisabledbysettingbit0ofSFRlocation8EH.Withthebitset,ALEisactiveonlyduringaMOVXorMOVCinstruction.Otherwise,thepinisweaklypulledhigh.SettingtheALE-disablebithasnoeffectifthemicrocontrollerisinexternalexecutionmode.

PSEN

ProgramStoreEnableisthereadstrobetoexternalprogrammemory.WhentheAT89C52isexecutingcodefromexternalprogrammemory,PSENisactivatedtwiceeachmachinecycle,exceptthattwoPSENactivationsareskippedduringeachaccesstoexternaldatamemory.ExternalAccessEnable.EAmustbestrappedtoGNDinordertoenablethedevicetofetchcodefromexternalprogrammemorylocationsstartingat0000HuptoFFFFH.Note,however,thatiflockbit1isprogrammed,EAwillbeinternallylatchedonreset.EAshouldbestrappedtoVCCforinternalprogramexecutions.Thispinalsoreceivesthe12-voltprogrammingenablevoltage（VPP）duringFlashprogrammingwhen12-voltprogrammingisselected.

XTAL1

Inputtotheinvertingoscillatoramplifierandinputtotheinternalclockoperatingcircuit.

XTAL2

Outputfromtheinvertingoscillatoramplifier.

SpecialFunctionRegisters

Amapoftheon-chipmemoryareacalledtheSpecialFunctionRegister（SFR）spaceisshowninTable1.Notethatnotalloftheaddressesareoccupied,andunoccupiedaddressesmaynotbeimplementedonthechip.Readaccessestotheseaddresseswillingeneralreturnrandomdata,andwriteaccesseswillhaveanindeterminateeffect.Usersoftwareshouldnotwrite1stotheseunlistedlocations,sincetheymaybeusedinfutureproductstoinvokenewfeatures.Inthatcase,theresetorinactivevaluesofthenewbitswillalwaysbe0.

Timer2Registers:

ControlandstatusbitsarecontainedinregistersT2CON（showninTable2）andT2MOD（showninTable4）forTimer2.Theregisterpair（RCAP2H,RCAP2L）aretheCapture/ReloadregistersforTimer2in16-bitcapturemodeor16-bitauto-reloadmode.

InterruptRegisters:

TheindividualinterruptenablebitsareintheIEregister.TwoprioritiescanbesetforeachofthesixinterruptsourcesintheIPregister.

DataMemory

TheAT89C52implements256bytesofon-chipRAM.Theupper128bytesoccupyaparalleladdressspacetotheSpecialFunctionRegisters.Thatmeanstheupper128byteshavethesameaddressesastheSFRspacebutarephysicallyseparatefromSFRspace.Whenaninstructionaccessesaninternallocationaboveaddress7FH,theaddressmodeusedintheinstructionspecifieswhethertheCPUaccessestheupper128bytesofRAMortheSFRspace.InstructionsthatusedirectaddressingaccessSFRspace.Forexample,thefollowingdirectaddressinginstructionaccessestheSFRatlocation0A0H（whichisP2）.

Instructionsthatuseindirectaddressingaccesstheupper128bytesofRAM.Forexample,thefollowingindirectaddressinginstruction,whereR0contains0A0H,accessesthedatabyteataddress0A0H,ratherthanP2（whoseaddressis0A0H）.

Notethatstackoperationsareexamplesofindirectaddressing,sotheupper128bytesofdataRAMareavailableasstackspace.

Timer0and1

Timer0andTimer1intheAT89C52operatethesamewayasTimer0andTimer1intheAT89C51.

Timer2

Timer2isa16-bitTimer/Counterthatcanoperateaseitheratimeroraneventcounter.Thetypeofoperationis

selectedbybitC/T2intheSFRT2CON（showninTable2）.Timer2hasthreeoperatingmodes:

capture,auto-reload（upordowncounting）,andbaudrategenerator.ThemodesareselectedbybitsinT2CON,asshowninTable3.Timer2consistsoftwo8-bitregisters,TH2andTL2.IntheTimerfunction,theTL2registerisincrementedeverymachinecycle.Sinceamachinecycleconsistsof12oscillatorperiods,thecountrateis1/12oftheoscillatorfrequency.

IntheCounterfunction,theregisterisincrementedinresponsetoa1-to-0transitionatitscorrespondingexternalinputpin,T2.Inthisfunction,theexternalinputissampledduringS5P2ofeverymachinecycle.Whenthesamplesshowahighinonecycleandalowinthenextcycle,thecountisincremented.ThenewcountvalueappearsintheregisterduringS3P1ofthecyclefollowingtheoneinwhichthetransitionwasdetected.Sincetwomachinecycles（24oscillatorperiods）arerequiredtorecognizea1-to-0transition,themaximumcountrateis1/24oftheoscillatorfrequency.Toensurethatagivenlevelissampledatleastoncebeforeitchanges,thelevelshouldbeheldforatleastonefullmachinecycle.

CaptureMode

Inthecapturemode,twooptionsareselectedbybitEXEN2inT2CON.IfEXEN2=0,Timer2isa16-bittimerorcounterwhichuponoverflowsetsbitTF2inT2CON.Thisbitcanthenbeusedtogenerateaninterrupt.IfEXEN2=1,Timer2performsthesameoperation,buta1-to-0transitionatexternalinputT2EXalsocausesthecurrentvalueinTH2andTL2tobecapturedintoRCAP2HandRCAP2L,respectively.Inaddition,thetransitionatT2EX