单片机外文翻译3.docx

单片机外文翻译3.docx

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单片机外文翻译3

外文及翻译

英文资料:

STC89C51（8-bitMicrocontrollerwith4KBytesFlash）

TheSTC89C51isalow-power,high-performanceCMOS8-bitmicrocontrollerwith4KbytesofIn-SystemProgrammableFlashmemory.ThedeviceismanufacturedusingAtmel'shigh-densitynonvolatilememorytechnologyandiscompatiblewiththeindustry-standard80C51instructionsetandpinout.Theon-chipFlashallowstheprogrammemorytobereprogrammedin-systemorbyaconventionalnonvolatilememoryprogrammer.Bycombiningaversatile8-bitCPUwithIn-SystemProgrammableFlashonamonolithicchip,theAtmelAT89C51isapowerfulmicrocontrollerwhichprovidesahighly-flexibleandcost-effectivesolutiontomanyembeddedcontrolapplications.

Features：

CompatiblewithMCS.-51Products

4KBytesofIn-SystemProgrammable（ISP）FlashMemory

Endurance:

1000Write/EraseCycles

4.0Vto5.5VOperatingRange

FullyStaticOperation:

0Hzto33MHz

Three-levelProgramMemoryLock

128x8-bitInternalRAM

32ProgrammableI/OLines

Two16-bitTimer/Counters

SixInterruptSources

FullDuplexUARTSerialChannel

Low-powerIdleandPower-downModes

InterruptRecoveryfromPower-downMode

WatchdogTimer

DualDataPointer

Power-offFlag

FastProgrammingTime

FlexibleISPProgramming（ByteandPageMode）

Green（Pb/Halide-free）PackagingOption

TheSTC89C51providesthefollowingstandardfeatures:

4KbytesofFlash,128bytesofRAM,32I/Olines,Watchdogtimer,twodatapointers,two16-bittimer/counters,afive-vectortwo-levelinterruptarchitecture,afullduplexserialport,on-chiposcillator,andclockcircuitry.Inaddition,theSTC89C51isdesignedwithstaticlogicforoperationdowntozerofrequencyandsupportstwosoftwareselectablepowersavingmodes.TheIdleModestopstheCPUwhileallowingtheRAM,timer/counters,serialport,andinterruptsystemtocontinuefunctioning.ThePower-downmodesavestheRAMcontentsbutfreezestheoscillator,disablingallotherchipfunctionsuntilthenextexternalinterruptorhardwarereset.

VCC：

Supplyvoltage（allpackagesexcept42-PDIP）.

GND：

Ground（allpackagesexcept42-PDIP;for42-PDIPGNDconnectsonlythelogiccoreandtheembeddedprogrammemory）.

VDD：

Supplyvoltageforthe42-PDIPwhichconnectsonlythelogiccoreandtheembeddedprogrammemory.

PWRVDD：

Supplyvoltageforthe42-PDIPwhichconnectsonlytheI/OPadDrivers.TheapplicationboardMUSTconnectbothVDDandPWRVDDtotheboardsupplyvoltage.

PWRGND：

Groundforthe42-PDIPwhichconnectsonlytheI/OPadDrivers.PWRGNDandGNDareweaklyconnectedthroughthecommonsiliconsubstrate,butnotthroughanymetallink.TheapplicationboardMUSTconnectbothGNDandPWRGNDtotheboardground.

Port0：

Port0isan8-bitopendrainbi-directionalI/Oport.Asanoutputport,eachpincansinkeightTTLinputs.When1sarewrittentoport0pins,thepinscanbeusedashigh-impedanceinputs.

Port0canalsobeconfiguredtobethemultiplexedlow-orderaddress/databusduringaccessestoexternalprogramanddatamemory.Inthismode,POhasinternalpull-ups.

Port0alsoreceivesthecodebytesduringFlashprogrammingandoutputsthecodebytesduringprogramverification.Externalpull-upsarerequiredduringprogramverification.

Port1：

Port1isan8-bitbi-directionalI/Oportwithinternalpull-ups.ThePort1outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort1pins,theyarepulledhighbytheinternalpull-upsandcanbeusedasinputs.Asinputs,Port1pinsthatareexternallybeingpulledlowwillsourcecurrent（lip）becauseoftheinternalpull-ups.

Port2：

Port2isan8-bitbi-directionalI/Oportwithinternalpull-ups.ThePort2outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort2pins,theyarepulledhighbytheinternalpull-upsandcanbeusedasinputs.Asinputs,Port2pinsthatareexternallybeingpulledlowwillsourcecurrent（lip）becauseoftheinternalpull-ups.

Port2emitsthehigh-orderaddressbyteduringfetchesfromexternalprogrammemoryandduringaccessestoexternaldatamemorythatuses16-bitaddresses（MOVX@DPTR）.Inthisapplication,Port2usesstronginternalpull-upswhenemitting1s.Duringaccessestoexternaldatamemorythatuse8-bitaddresses（MOVX@RI）,Port2emitsthecontentsoftheP2SpecialFunctionRegister.

Port2alsoreceivesthehigh-orderaddressbitsandsomecontrolsignalsduringFlashprogrammingandverification.

Port3：

Port3isan8-bitbi-directionalI/Oportwithinternalpull-ups.ThePort3outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort3pins,theyarepulledhighbytheinternalpull-upsandcanbeusedasinputs.Asinputs,Port3pinsthatareexternallybeingpulledlowwillsourcecurrent（lip）becauseofthepull-ups.

Port3receivessomecontrolsignalsforFlashprogrammingandverification.

Port3alsoservesthefunctionsofvariousspecialfeaturesoftheSTC89C51，asshowninthefollowingtable.

RST：

Resetinput.Ahighonthispinfortwomachinecycleswhiletheoscillatorisrunningresetsthedevice.ThispindrivesHighfor98oscillatorperiodsaftertheWatchdogtimesout.TheDISRTObitinSFRAUXR（address8EH）canbeusedtodisablethisfeature.InthedefaultstateofbitDISRTO,theRESETHIGHoutfeatureisenabled.

ALE/PROG：

AddressLatchEnable（ALE）isanoutputpulseforlatchingthelowbyteoftheaddressduringaccessestoexternalmemory.Thispinisalsotheprogrampulseinput（PROG）duringFlashprogramming.Innormaloperation,ALEisemittedataconstantrateof1/6theoscillatorfrequencyandmaybeusedforexternaltimingorclockingpurposes.Note,however,thatoneALEpulseisskippedduringeachaccesstoexternaldatamemory.

Ifdesired,ALEoperationcanbedisabledbysettingbit0ofSFRlocation8EH.Withthebitset,ALEisactiveonlyduringaMOVXorMOVCinstruction.Otherwise,thepinisweaklypulledhigh.SettingtheALE-disablebithasnoeffectifthemicrocontrollerisinexternalexecutionmode.

PSEN：

ProgramStoreEnable（PSEN）isthereadstrobetoexternalprogrammemory.

WhentheAT89S51isexecutingcodefromexternalprogrammemory,PSENisactivatedtwiceeachmachinecycle,exceptthattwoPSENactivationsareskippedduringeachaccesstoexternaldatamemory.

EA/VPP：

ExternalAccessEnable.EAmustbestrappedtoGNDinordertoenablethedevicetofetchcodefromexternalprogrammemorylocationsstartingatOOOOHuptoFFFFH.Note,however,thatiflockbit1isprogrammed,EAwillbeinternallylatchedonreset.

EAshouldbestrappedtoVccforinternalprogramexecutions.

Thispinalsoreceivesthe12-voltprogrammingenablevoltage（VPP）duringFlashprogramming.

XTAL1：

Inputtotheinvertingoscillatoramplifierandinputtotheinternalclockoperatingcircuit.

XTAL2：

Outputfromtheinvertingoscillatoramplifier

SpecialFunctionRegisters：

Notethatnotalloftheaddressesareoccupied,andunoccupiedaddressesmaynotbeimplementedonthechip.Readaccessestotheseaddresseswillingeneralreturnrandomdata,andwriteaccesseswillhaveanindeterminateeffect.

Usersoftwareshouldnotwrite1stotheseunlistedlocations,sincetheymaybeusedinfutureproductstoinvokenewfeatures.Inthatcase,theresetorinactivevaluesofthenewbitswillalwaysbe0.

InterruptRegisters:

TheindividualinterruptenablebitsareintheIEregister.TwoprioritiescanbesetforeachofthefiveinterruptsourcesintheIPregister.

DualDataPointerRegisters:

Tofacilitateaccessingbothinternalandexternaldatamemory,twobanksof16-bitDataPointerRegistersareprovided:

DPOatSFRaddresslocations82H-83HandDP1at84H-85H.BitDPS=0inSFRAUXR1selectsDPOandDPS=1selectsDP1.TheusershouldALWAYSinitializetheDPSbittotheappropriatevaluebeforeaccessingtherespectiveDataPointerRegister.

PowerOffFlag:

ThePowerOffFlag（POF）islocatedatbit4（PCON.4）inthePCONSFR.POFissetto"1”duringpowerup.Itcanbesetandrestundersoftwarecontrolandisnotaffectedbyreset.

MemoryOrganization：

MCS-51deviceshaveaseparateaddressspaceforProgramandDataMemory.Upto64K byteseachofexternalProgramandDataMemorycanbeaddressed.

ProgramMemory：

IftheEApinisconnectedtoGND,allprogramfetchesaredirectedtoexternalmemory.OntheSTC89S51，ifEAisconnectedtoVcc,programfetchestoaddressesOOOOHthroughFFFHaredirectedtointernalmemoryandfetchestoaddresses1000HthroughFFFFHaredirectedtoexternalmemory.

DataMemory：

TheSTC89S51implements128bytesofon-chipRAM.The128bytesareaccessibleviadirectandindirectaddressingmodes.Stackoperationsareexamplesofindirectaddressing,sothe128bytesofdataRAMareavailableasstackspace.

WatchdogTimer（One-timeEnabledwithReset-out）：

TheWDTisintendedasarecoverymethodinsituationswheretheCPUmaybesubjectedtosoftwareupsets.TheWDTconsistsofa14-bitcounterandtheWatchdogTimerReset（WDTRST）SFR.TheWDTisdefaultedtodisablefromexitingreset.ToenabletheWDT,ausermustwrite01EHandOE1HinsequencetotheWDTRSTregister（SFRlocationOA6H）.WhentheWDTisenabled,itwillincrementeverymachinecyclewhiletheoscillatorisrunning.TheWDTtimeoutperiodisdependentontheexternalclockfrequency.ThereisnowaytodisabletheWDTexceptthroughreset（eitherhardwareresetorWDToverflowreset）.WhenWDToverflows,itwilldriveanoutputRESETHIGHpulseattheRSTpin.

Timer0and1：

Timer0andTimer1isa16-bitTimer/Counter.

中文翻译:

STC89C51（8位微控制单片机，片内含4Kbytes可系统编程的存储器）

STC89C51是美国ATMEL公司生产的低功耗，高性能CMOS8位单片机，片内含4kbytes的可系统编程的Flash只读程序存储器，器件采用ATMEL公司的高密度、非易失性存储技术生产，兼容标准8051指令系统及引脚。

它集Flash程序存储器既可在线编程（ISP）