at89c52单片机中英文资料对照外文翻译文献综述.docx

at89c52单片机中英文资料对照外文翻译文献综述.docx

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at89c52单片机中英文资料对照外文翻译文献综述

at89c52单片机简介

中英文资料对照外文翻译文献综述

AT89C52Single-chipmicroprocessorintroduction

SelectionofSingle-chipmicroprocessor

1.DevelopmentofSingle-chipmicroprocessor

ThemaincomponentpartofSingle-chipmicroprocessorasaresultofbysuchcentralizetobelivingtoobtainonthechip，InimmediatefuturemiddleprocessorCPU。

StorageRAMimmediately﹑memoyreadROM﹑Interruptsystem、Timer/'scounteralongwithI/O'srimelectriccircuitawaitsthemainmicrocomputersection，Thelumpingislivingonthechip。

AlthoughtheSingle-chipmicroprocessorrisonlyachip，Yetthroughmakesupandthemeritorousservicebeabletoonsees，Ithadhaveedthecalculatingmachinesystemproperty，callingitforthisreasonactasSingle-chipmicroprocessorrminisizecalculatingmachineSCMSandabbreviatetheSingle-chipmicroprocessor。

1976YeartheIntercorporationputout8MCS－48SetSingle-chipmicroprocessorcomputer，Afterbeinglivingmorethan20yearstimeindevelopmentthatobtaincontinuouslyandwide-rangingapplication。

1980YearthatcorporationputouthighperformanceMCS－51SetSingle-chipmicroprocessor。

ThistypeofSingle-chipmicroprocessormeritorousservicecapacity、Theaddressingrangewhollythanearlyphaseliftsomewhat，Usealsocomparativelyfarmoreatthemoment。

1982Yearthatcorporationputoutthetaller16Single-chipmicroprocessorMCSofperformanceoncemore－96Set。

TheSingle-chipmicroprocessorcomputerdevelopmenthaveestheperformancemoreandmoretobeimproved﹑Moreandmoredistinguishingsfeatureofstrain。

2.AdopttheSingle-chipmicroprocessorstrongpoint

Hackeruse，Agileizationofapplication。

●Havememory、Calculationandlook-upmeritorousservicecapacity。

Maymaketheapparatusbearingthattherulecannotmake。

●Thecommandsystemisfitforthereal-timecontrol。

●Bulkislittle，Executionspeedisquickly。

●Dependabilityishigh，Theantijammingcapabilityispowerful。

●Thetemperatureuselimitisvast。

●Power-offprotectionisimproved。

●Theproductdevelopmentcyclebrief。

●Identicalsetismuchasthenecessaryinterfacechipsort，Themeritorousservicebeabletobecompletely，Beconvenientfortopickupachievetheminimalsystem。

●Onthebasisofthetallscienceandtechnologydemand，Integrationincommonusesoftware，Hardware（IncasePL/Mlanguage，DAM'swavepatternproducer，Analogswitchawaits）Applicationisagile。

Hence，NativeisdesignedadopingwiththeSingle-chipmicroprocessorcorecomponentsdesigns。

3.AT89C52Component

AT89C52microprocessormainfunctionparameter：

AndcompletelycompatiblewiththeMCS-51productinstructionandthepin

The8Kbyteisprogrammable/scratcheswritesFlashtododgethefastmemory

1,000timescratcheswritesthecycle

Entirestaticoperation:

0Hz-24MHz

Threelevelsofencryptionsprogrammemory

256×8byteinteriorRAMs

32programmableI/Olines

316fixedtime/counters

8interruptsources

ProgrammableserialUARTchannel

Thelowpowerlossisidleandfallstheelectricitypattern

CPU'scomposition

TheCPUistheSingle-chipmicroprocessorcorecomponents，Itconsistsofthatruingthearithmeticsumcontrollerawait。

1.Arithmeticunit

Themeritorousserviceofarithmeticunitbeabletobecarryingonarithmeticoperationandlogicoperation，Thehalf-bytemaybeadjust﹑Theseparatewordlengthandsoonthedatamanipulate。

2.OrdercounterPC

Itisusedforleavingsecondorderwhichwillthebecarriedoutaddress。

TheaddressthattheorderpointsoutinaccordancePCbringsoutthroughthestorageafterwards，ThePCbeabletoplus1voluntarily，Inimmediatefuturepointtothesecondorder。

3.Orderproductregister

Leavetheinstructioncodeintheorderregister。

WhenCPU'sexecuteinstruction，Sendintotheorderregisterthroughreadingaloudtheinstructioncodegetintheorderstorage，Decipherqueenafterthedecipherer，Issuetherelevantcontrolsignalthroughfixedtimeagainstthecontrolcircuit。

Completetheordermeritorousservicecapacity.

Storage

1.Orderstorage

Usedtoleaveorderandformconstant。

Asto8751，EA＝1Hour，Sliceinternalprocedurestorageisoccupied0000H～0WhenFFFH，Orderstoragefetchpiecethroughtheslice.

2.Datastorageutensil

8751NomattertheSingle-chipmicroprocessordatastorageutensilislivingonthephysicsandthelogicgoesupwhollybeingdividedintotwoaddresssspace，Oneactastheinternaldatastorage，CallontheinternaldatastorageinthewayoforderofMOV's，Anotheractastheexternaldatastorageutensil，CallonexternaldatastoragearticlesofdailyuseorderofMOVX's，Addressingmodeindirectaddressing。

Meritorousservicecapacityregisterspecial.

MCS－51LatchinnerplacetheSingle-chipmicroprocessor、Timer、Serialportdatabumpersalongwithdifferentcontrolregisterandtheconditionsregisterhaswhollyariseedwiththemeritorousservicecapacityregisterspecialshape。

TAM'saddressspacelimitincludedtheydecentralizeddistributions（80H～FDH）Itisinside。

8751Theinsideparticularmeritorousservicecapacityregisterconsistsofoperatingtheregister、Registerofaddress、Therimlatchreachestobeusedtheinterception、Count/fixedatimeandtheserialportadministrationregister。

ThecalculationregisterconsistsofaccumulatorA、RegisterBandprogrammodewordregisterPSW。

TheregisterofaddressconsistsofindicatorDPTRofwarehouseindicatorSPanddataaddresses。

MCS－51TheSPofSingle-chipmicroprocessoractas8，TheplaceincludedthewarehouseamongtheRAMiscomparativelymoreagile。

DatapointerDPTRis16registers，SuchhighpositionbyteisexpressedinthewayofDPh，ThepositionisexpressedinthewayofDPI，Inimmediatefuturemayas16registerDPTRsthehandle，8registerDPhandDPIswhoalsomaydoworthwhileindependencehandle。

PortP0～TheP3isseparatelyI/OportP0～ThelatchofP3。

P0～P3isasregisterspecialstillusabledirectaddressingmeansparticipationelseoperatinginstructionoperation。

SerialdatabumperSBUFisusedconveyingeitherthedatathereceiveedloading，Inrealityitisconsisingoftwoindependenceregisters，Oneistransmitingthebumper，Anotherisreceivesthebumper。

AT89C52pinexplanation

TheAT89C52monolithicintegratedcircuituses40pinsthedoublerowstraighttoinsertthesealway.

Thepowersourcepinturnsonthemonolithicintegratedcircuittheworkpowersource.

VCC:

Meetsthe+5Vpowersource.

GND:

Earth.

●Port0:

Port0isan8-bitopendrainbi-directionalI/Oport.Asanoutputport,eachpincansinkeightTTLinputs.When1sarewrittentoport0pins,thepinscanbeusedashighimpedanceinputs.

Port0canalsobeconfiguredtobethemultiplexedloworderaddress/databusduringaccessestoexternalprogramanddatamemory.Inthismode,P0hasinternalpullups.

Port0alsoreceivesthecodebytesduringFlashprogrammingandoutputsthecodebytesduringprogramverification.Externalpullupsarerequiredduringprogramverification.

●Port1:

Port1isan8-bitbi-directionalI/Oportwithinternalpullups.ThePort1outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort1pins,theyarepulledhighbytheinternalpullupsandcanbeusedasinputs.Asinputs,Port1pinsthatareexternallybeingpulledlowwillsourcecurrent（IIL）becauseoftheinternalpullups.

Inaddition,P1.0andP1.1canbeconfiguredtobethetimer/counter2externalcountinput（P1.0/T2）andthetimer/counter2triggerinput（P1.1/T2EX）,respectively,asshowninthefollowingtable.

Port1alsoreceivesthelow-orderaddressbytesduringFlashprogrammingandverification.

●Port2:

Port2isan8-bitbi-directionalI/Oportwithinternalpullups.ThePort2outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort2pins,theyarepulledhighbytheinternalpullupsandcanbeusedasinputs.Asinputs,Port2pinsthatareexternallybeingpulledlowwillsourcecurrent（IIL）becauseoftheinternalpullups.

Port2emitsthehigh-orderaddressbyteduringfetchesfromexternalprogrammemoryandduringaccessestoexternaldatamemorythatuse16-bitaddresses（MOVX@DPTR）.Inthisapplication,Port2usesstronginternalpullupswhenemitting1s.Duringaccessestoexternaldatamemorythatuse8-bitaddresses（MOVX@RI）,Port2emitsthecontentsoftheP2SpecialFunctionRegister.

Port2alsoreceivesthehigh-orderaddressbitsandsomecontrolsignalsduringFlashprogrammingandverification.

●Port3:

Port3isan8-bitbi-directionalI/Oportwithinternalpullups.ThePort3outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort3pins,theyarepulledhighbytheinternalpullupsandcanbeusedasinputs.Asinputs,Port3pinsthatareexternallybeingpulledlowwillsourcecurrent（IIL）becauseofthepullups.

Port3alsoservesthefunctionsofvariousspecialfeaturesoftheAT89C51,asshowninthefollowingtable.

Port3alsoreceivessomecontrolsignalsforFlashprogrammingandverification.

●RST:

Resetinput.Ahighonthispinfortwomachinecycleswhiletheoscillatorisrunningresetsthedevice

●ALE/PROG:

AddressLatchEnableisanoutputpulseforlatchingthelowbyteoftheaddressduringaccessestoexternalmemory.Thispinisalsotheprogrampulseinput（PROG）duringFlashprogramming.

Innormaloperation,ALEisemittedataconstantrateof1/6theoscillatorfrequencyandmaybeusedforexternaltimingorclockingpurposes.Note,however,thatoneALEpulseisskippedduringeachaccesstoexternaldatamemory.

Ifdesired,ALEoperationcanbedisabledbysettingbit0ofSFRlocation8EH.Withthebitset,ALEisactiveonlyduringaMOVXorMOVCinstruction.Otherwise,thepinisweaklypulledhigh.SettingtheALE-disablebithasnoeffectifthemicrocontrolleris