数字系统设计与PLD应用 实验报告Word下载.docx

数字系统设计与PLD应用 实验报告Word下载.docx

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INSTD_LOGIC）;

ENDTRAFFIC_CONTROL;

ARCHITECTUREAOFTRAFFIC_CONTROLIS

TYPESTATE_SPACEIS（S0,S1,S2,S3）;

SIGNALSTATE:

STATE_SPACE;

BEGIN

PROCESS（RESET,CLK）

BEGIN

IFRESET='

1'

THEN

STATE<

=S0;

ELSIF（CLK'

EVENTANDCLK='

）THEN

CASESTATEIS

WHENS0=>

IFW1='

STATE<

=S1;

ENDIF;

WHENS1=>

IFW2='

=S2;

WHENS2=>

IFW3='

THEN

=S3;

ENDIF;

WHENS3=>

ENDCASE;

ENDPROCESS;

C1<

='

WHENSTATE=S0ELSE'

0'

;

C2<

WHENSTATE=S1ORSTATE=S3ELSE'

C3<

WHENSTATE=S2ELSE'

R1<

WHENSTATE=S1ORSTATE=S0ELSE'

Y1<

WHENSTATE=S3ELSE'

G1<

R2<

WHENSTATE=S2ORSTATE=S3ELSE'

Y2<

WHENSTATE=S1ELSE'

G2<

ENDA;

ENTITYCOUNT30IS

PORT

（

CLK:

ENABLE:

C:

OUTSTD_LOGIC

）;

ENDCOUNT30;

ARCHITECTUREAOFCOUNT30IS

PROCESS（CLK）

VARIABLECNT:

INTEGERRANGE30DOWNTO0;

IF（CLK'

）THEN

IFENABLE='

ANDCNT<

30THEN

CNT:

=CNT+1;

ELSE

=0;

IFCNT=30THEN

C<

ELSE

ENDA;

ENTITYCOUNT05IS

（CLK:

ENABLE:

C:

OUTSTD_LOGIC）;

ENDCOUNT05;

ARCHITECTUREAOFCOUNT05IS

BEGIN

INTEGERRANGE5DOWNTO0;

5THEN

IFCNT=5THEN

ENTITYCOUNT26IS

ENDCOUNT26;

ARCHITECTUREAOFCOUNT26IS

INTEGERRANGE26DOWNTO0;

26THEN

IFCNT=26THEN

实验三、九九乘法表系统的设计

试设计一个供儿童学习九九乘法表之用的数字系统，该系统既可引导学习着跟随学习机连续背诵；

也可随时查找任何在两个1位十进制数的相乘结果。

九九乘法表系统能够自动或手动进行两个1位十进制数的乘法，并自动显示被乘数、乘数和乘积，该系统示意图如图6-18所示。

图中AA和BB分别为被乘数和乘数的外部输入端，它们用1位BCD码表示。

系统用十进制七段数字显示器显示被乘数A、乘数B和乘积M的值，其中M用2位十进制显示器显示。

PACKAGEPLUS_LIBIS

COMPONENTPLUSCONTROL

PORT（CLK:

START,ARH,TT,EE:

DONE,CRT,S,ENT:

ENDCOMPONENT;

COMPONENTCOUNT8

CRT,ENT:

TT:

COMPONENTCNT1

CRT:

OC:

QA:

OUTINTEGERRANGE9TO0）;

COMPONENTCNT2

EN2:

EE:

QB:

COMPONENTMUX1

PORT（BB,QB:

ININTEGERRANGE9DOWNTO0;

S:

B:

OUTINTEGERRANGE9DOWNTO0）;

COMPONENTMUX2

PORT（AA,QA:

A:

COMPONENTPLUS

PORT（A:

M:

OUTINTEGERRANGE81DOWNTO0）;

COMPONENTTRANS

PORT（M:

ININTEGERRANGE81TO0;

BD2,BD1:

COMPONENTDISPLAY

PORT（BD1:

ININTEGERRANGE9TO0;

XA1:

OUTSTD_LOGIC_VECTOR（6DOWNTO0））;

ENDPLUS_LIB;

USEWORK.PLUS_LIB.ALL;

ENTITYPLUSTOPIS

START,ARH:

BB,AA:

XA1,XA2:

OUTSTD_LOGIC_VECTOR（6DOWNTO0）;

XA3,XA4:

ENDPLUSTOP;

ARCHITECTUREONEOFPLUSTOPIS

SIGNALTT,EE,ENT,CRT,DONE,OC,S:

STD_LOGIC;

SIGNALQA,QB,B,A:

INTEGERRANGE9DOWNTO0;

SIGNALM:

INTEGERRANGE81DOWNTO0;

SIGNALBD1,BD2:

CONTROL:

PLUSCONTROL

PORTMAP（CLK,START,ARH,TT,EE,DONE,CRT,S,ENT）;

COUNT1:

COUNT8

PORTMAP（CLK,CRT,ENT,TT）;

COUNT2:

CNT1

PORTMAP（CLK,CRT,OC,QA）;

COUNT3:

CNT2

PORTMAP（CLK,CRT,OC,EE,QB）;

M1:

MUX1

PORTMAP（BB,QB,S,B）;

M2:

MUX2

PORTMAP（AA,QA,S,A）;

P1:

PLUS

PORTMAP（A,B,M）;

T1:

TRANS

PORTMAP（M,BD2,BD1）;

X1:

DISPLAY

PORTMAP（A,XA1）;

X2:

PORTMAP（B,XA2）;

X3:

PORTMAP（BD1,XA3）;

X4:

PORTMAP（BD2,XA4）;

ENDONE;

ENTITYPLUSCONTROLIS

PORT（

CLK:

ENDPLUSCONTROL;

ARCHITECTUREONEOFPLUSCONTROLIS

TYPESTATE_SPACEIS（S0,S1,S2,S3）;

SIGNALSTATE:

CASESTATEIS

IFSTART='

IFARH='

IFTT='

IFEE='

ENDCASE;

DONE<

WHENSTATE=S0ELSE'

CRT<

S<

WHENSTATE=S3ELSE'

ENT<

WHENSTATE=S2ELSE'

ENDONE;

ENTITYCOUNT8IS

PORT（CLK:

INSTD_LOGIC;

TT:

END;

ARCHITECTUREONEOFCOUNT8IS

VARIABLECOUNT:

INTEGERRANGE0TO7;

IFCLK'

THEN

IFCRT='

ANDENT='

IFCOUNT=7THEN

COUNT:

TT<

ELSE

=COUNT+1;

ENDIF;

ENDIF;

ENDIF;

ENTITYCNT1IS

OC:

OUTINTEGERRANGE0TO9）;

ARCHITECTUREONEOFCNT1IS

INTEGERRANGE0TO9;

IFCLK'

IFCRT='

IFCOUNT=9THEN

COUNT:

OC<

ELSIFCOUNT=8THEN

ELSE

QA<

=COUNT;

ENTITYCNT2IS

CRT:

EN2:

EE:

QB:

ARCHITECTUREONEOFCNT2IS

IFEN2='

IFCOUNT=9THEN

EE<

ELSE

EE<

QB<

ENTITYTRANSIS

PORT（M:

ININTEGERRANGE0TO81;

ENDTRANS;

ARCHITECTUREONEOFTRANSIS

PROCESS（M）

IFM<

=9THEN

BD2<

BD1<

=M;

ElSIFM<

=19THEN

=1;

=M-10;

=29THEN

=2;

=M-20;

=39THEN

=3;

=M-30;

=49THEN

=4;

=M-40;

=59THEN

=5;

=M-50;

=69THEN

=6;

=M-60;

=79THEN

=7;

=M-70;

ElSE

=8;

=M-80;

ENDIF;

ENDPROCESS;

ENTITYDISPLAYIS

ENDDISPLAY;

ARCHITECTUREONEOFDISPLAYIS

WITH（BD1）SELECT

XA1<

="

0000001"

WHEN0,

"

1001111"

WHEN1,

0010010"

WHEN2,

0000110"

WHEN3,

1001100"

WHEN4,

0100100"

WHEN5,

0100000"

WHEN6,

0001111"

WHEN7,

0000000"

WHEN8,

0000100"

WHEN9;

LIBRARYIEEE;

ENTITYMUX1IS

PORT（BB,QB:

ININTEGERRANGE0TO9;

S:

B:

OUTINTEGERRANGE0TO9

ENDMUX1;

ARCHITECTUREONEOFMUX1IS

B<

=QBWHENS='

ELSEBB;

ENTITYMUX2IS

PORT（AA,QA:

A:

ENDMUX2;

ARCHITECTUREONEOFMUX2IS

A<

=QAWHENS='

ELSEAA;

ENTITYPLUSIS

PORT（A:

M:

OUTINTEGERRANGE0TO81）;

ENDPLUS;

ARCHITECTUREONEOFPLUSIS

M<

=A*B;