使用labview fpga模块开发可编程自动化控制器外文文献及翻译大学论文Word下载.docx

使用labview fpga模块开发可编程自动化控制器外文文献及翻译大学论文Word下载.docx

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of 

transmitter 

module 

is 

looped 

back 

to 

rx 

input 

receiver 

module. 

This 

allows 

be 

used 

as 

test 

signal 

generator 

for 

Data 

can 

written 

in 

parallel 

format 

and 

serial 

module, 

data 

received 

finally 

read 

out 

from 

In 

order 

automate 

testing 

UART 

much 

possible, 

tree 

independent 

Verilog 

tasks 

were 

follows. 

The 

task“write_to_transmitter” 

holds 

all 

necessary 

statements 

required 

generate 

a 

single 

write 

sequence 

that 

are 

upon 

execution 

“write_to_transmitter” 

task, 

get 

latched 

internal 

later 

analysis. 

task 

“read_out_receiver” 

parallel 

“compare_data” 

compare 

previous 

the 

corresponding 

most 

recent 

receive 

r 

If 

any 

discrepancy 

occurs, 

flags 

an 

error 

by 

writing 

values 

well 

simulation 

immediately 

stopped 

if 

occurs. 

Besides 

above 

mentioned 

tasks, 

mclkx16, 

master 

reset 

signals 

“tx 

rx” 

loop 

feature. 

considered 

trivial, 

will 

not 

illustrated 

here, 

but 

referred 

within 

itself. 

core 

behavioral 

level 

“for 

loop” 

executes 

possible 

combinations 

verify 

same 

gets 

properly 

receiver. 

showedbelowinfigure21.Next 

port 

definitions 

comes 

directions. 

Directions 

specified 

input, 

or 

inout 

（bidirectional）, 

table 

1. 

Next 

specification 

directions 

declaration 

signals. 

Internal 

declared 

“wire” 

“reg” 

types. 

Signals 

type 

continuos 

assignments, 

also 

called 

combinatorial 

statements. 

assignments 

“always” 

block, 

often 

use 

sequential 

logic 

necessarily. 

For 

further 

explanation 

see 

aVerilog 

reference 

book. 

types 

3.We 

have 

now 

passed 

declarations, 

ready 

look 

at 

actual 

implementation. 

Using 

hardware 

description 

language 

us 

describe 

function 

more 

manner, 

rather 

than 

focus 

on 

it’s 

implementation 

gate 

software 

programming 

language, 

functions 

procedures 

breaks 

larger 

programs 

into 

readable, 

manageable 

certainly 

maintainable 

pieces. 

provides 

functions 

constructs, 

analogous 

procedures. 

A 

task 

equivalent 

multiple 

lines 

code, 

where 

certain 

inputs 

affects 

outputs 

variables. 

usually 

takes 

place 

code 

repeatedly 

design, 

hence 

makes 

design 

easier 

maintain. 

can 

inputs, 

always 

only 

one 

output, 

while 

both 

even 

some 

cases, 

non 

each. 

Below 

shown 

hold 

statements, 

describe 

“shift” 

mode

WiththeLabVIEWFPGAModuleandNIRIOhardware,younowcanuseLabVIEW,ahigh-levelgraphicaldevelopmentenvironmentdesignedspecificallyformeasurementandcontrolapplications,tocreatePACsthathavethecustomization,flexibility,andhigh-performanceofFPGAs.BecausetheLabVIEWFPGAModuleconfigurescustomcircuitryinhardware,yoursystemcanprocessandgeneratesynchronizedanaloganddigitalsignalsrapidlyanddeterministically.Figure1illustratesmanyoftheNIRIOdevicesthatyoucanconfigureusingtheLabVIEWFPGAModule.

Figure1.LabVIEWFPGAVIBlockDiagramandRIOHardwarePlatforms

NIRIOHardwareforPACs

Historically,programmingFPGAshasbeenlimitedtoengineerswhohavein-depthknowledgeofVHDLorotherlow-leveldesigntools,whichrequireovercomingaverysteeplearningcurve.WiththeLabVIEWFPGAModule,NIhasopenedFPGAtechnologytoabroadersetofengineerswhocannowdefineFPGAlogicusingLabVIEWgraphicaldevelopment.Measurementandcontrolengineerscanfocusprimarilyontheirtestandcontrolapplication,wheretheirexpertiselies,ratherthanthelow-levelsemanticsoftransferringlogicintothecellsofthechip.TheLabVIEWFPGAModulemodelworksbecauseofthetightintegrationbetweentheLabVIEWFPGAModuleandthecommercialoff-the-shelf（COTS）hardwarearchitectureoftheFPGAandsurroundingI/Ocomponents.

NationalInstrumentsPACsprovidemodular,off-the-shelfplatformsforyourindustrialcontrolapplications.WiththeimplementationofRIOtechnologyonPCI,PXI,andCompactVisionSystemplatformsandtheintroductionofRIO-basedCompactRIO,engineersnowhavethebenefitsofaCOTSplatformwiththehigh-performance,flexibility,andcustomizationbenefitsofFPGAsattheirdisposaltobuildPACs.NationalInstrumentsPCIandPXIRSeriesplug-indevicesprovideanaloganddigitaldataacquisitionandcontrolforhigh-performance,user-configurabletimingandsynchronization,aswellasonboarddecisionmakingonasingledevice.Usingtheseoff-the-shelfdevices,youcanextendyourNIPXIorPCIindustrialcontrolsystemtoincludehigh-speeddiscreteandanalogcontrol,customsensorinterfaces,andprecisetimingandcontrol.

NICompactRIO,aplatformcenteredonRIOtechnology,providesasmall,industriallyrugged,modularPACplatfo