altera公司IP核使用手册资料下载.pdf

altera公司IP核使用手册资料下载.pdf

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101InnovationDriveSanJose,CAHyperTransportMegaCoreFunctionUserGuideMegaCoreVersion:

@#@9.0DocumentDate:

@#@March2009Copyright2009AlteraCorporation.Allrightsreserved.Altera,TheProgrammableSolutionsCompany,thestylizedAlteralogo,specificdevicedesignations,andallotherwordsandlogosthatareidentifiedastrademarksand/orservicemarksare,unlessnotedotherwise,thetrademarksandservicemarksofAlteraCorporationintheU.S.andothercountries.Allotherproductorservicenamesarethepropertyoftheirrespectiveholders.AlteraproductsareprotectedundernumerousU.S.andforeignpatentsandpendingap-plications,maskworkrights,andcopyrights.AlterawarrantsperformanceofitssemiconductorproductstocurrentspecificationsinaccordancewithAlterasstandardwarranty,butreservestherighttomakechangestoanyproductsandservicesatanytimewithoutnotice.Alteraassumesnoresponsibilityorliabilityarisingoutoftheapplicationoruseofanyinformation,product,orservicedescribedhereinexceptasexpresslyagreedtoinwritingbyAlteraCorporation.Alteracustomersareadvisedtoobtainthelatestversionofdevicespecificationsbeforerelyingonanypublishedinformationandbeforeplacingordersforproductsorservices.UG-MCHYPRTRNS-1.11March2009AlteraCorporationHyperTransportMegaCoreFunctionUserGuideContentsChapter1.AboutthisMegaCoreFunctionReleaseInformation.11DeviceFamilySupport.11Introduction.12Features.12OpenCorePlusEvaluation.13Performance.13Chapter2.GettingStartedDesignFlow.21MegaCoreFunctionWalkthrough.22CreateaNewQuartusIIProject.22LaunchtheMegaWizardPlug-inManager.23Step1:

@#@Parameterize.25Step2:

@#@SetUpSimulation.29Step3:

@#@Generate.211SimulatetheDesign.213CompiletheDesign.213ProgramaDevice.214SetUpLicensing.215AppendtheLicensetoYourlicense.datFile.215SpecifytheLicenseFileintheQuartusIISoftware.215ExampleSimulationandCompilation.216ExampleQuartusIIProject.216ExampleSimulationwithTestVectors.216Chapter3.SpecificationsHyperTransportTechnologyOverview.31HTSystems.32HTFlowControl.33HyperTransportMegaCoreFunctionSpecification.33PhysicalInterface.34SynchronizationandAlignment.34ProtocolInterface.35ClockingOptions.37HyperTransportMegaCoreFunctionParametersandHTLinkPerformance.310Signals.314CSRModule.331OpenCorePlusTime-OutBehavior.340AppendixA.ParametersIntroduction.A1ParameterLists.A1DeviceFamilyandReadOnlyRegisters.A1BaseAddressRegisters.A2ClockingOptions.A3AdvancedSettings.A3ivContentsHyperTransportMegaCoreFunctionUserGuideMarch2009AlteraCorporationAppendixB.StratixDevicePinAssignmentsIntroduction.B1Guidelines.B1AppendixC.ExampleDesignGeneralDescription.C1AdditionalInformationRevisionHistory.Info1HowtoContactAltera.Info1TypographicConventions.Info2March2009AlteraCorporationHyperTransportMegaCoreFunctionUserGuidePreliminary1.AboutthisMegaCoreFunctionReleaseInformationTable11providesinformationaboutthisreleaseoftheHyperTransportMegaCorefunction.AlteraverifiesthatthecurrentversionoftheQuartusIIsoftwarecompilesthepreviousversionofeachMegaCorefunction.AnyexceptionstothisverificationarereportedintheMegaCoreIPLibraryReleaseNotesandErrata.AlteradoesnotverifycompilationwithMegaCorefunctionversionsolderthanonerelease.DeviceFamilySupportMegaCorefunctionsprovideeitherfullorpreliminarysupportfortargetAlteradevicefamilies:

@#@FullsupportmeanstheMegaCorefunctionmeetsallfunctionalandtimingrequirementsforthedevicefamilyandmaybeusedinproductiondesigns.PreliminarysupportmeanstheMegaCorefunctionmeetsallfunctionalrequirements,butmaystillbeundergoingtiminganalysisforthedevicefamily;@#@itmaybeusedinproductiondesignswithcaution.Table12showsthelevelofsupportofferedbytheHyperTransportMegaCorefunctionforeachoftheAlteradevicefamilies.Table11.HyperTransportMegaCoreFunctionReleaseInformationItemDescriptionVersion9.0ReleaseDateMarch2009OrderingCodeIP-HTProductID（s）0098VendorID（s）6AF7Table12.DeviceFamilySupportDeviceFamilySupportHardCopyStratixFullStratixFullStratixIIFullStratixIIGXPreliminaryStratixGXFullOtherdevicefamiliesNosupport12Chapter1:

@#@AboutthisMegaCoreFunctionIntroductionHyperTransportMegaCoreFunctionUserGuideMarch2009AlteraCorporationPreliminaryIntroductionTheHyperTransportMegaCorefunctionimplementshigh-speedpackettransfersbetweenphysical（PHY）andlink-layerdevices,andisfullycompliantwiththeHyperTransportI/OLinkSpecification,Revision1.03.ThisMegaCorefunctionallowsdesignerstointerfacetoawiderangeofHyperTransporttechnology（HT）enableddevicesquicklyandeasily,includingnetworkprocessors,coprocessors,videochipsets,andASICs.FeaturesTheHyperTransportMegaCorefunctionhasthefollowingfeatures:

@#@8-bitfullyintegratedHTend-chaininterfacePacket-