多通道数据采集卡FPGA设计文档汇编Word格式.docx
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1Sram_dout与Sram_din两个箭头方向换了一下,方便程序阅读;
2SPI_slave_Mgnt与Clock_Mgnt之间增加datarate_choose[2:
1],方向从SPI_Slave_Mgnt到Clock_Mgnt。
FPGA功能实现
SPISlaveManagement
Cortex-M3设置为SPIMaster模式,FPGA实现SPISlave的功能
可以完成寄存器、SRAM的访问
SPISlave
Registers:
64*16Bits
SRAM:
1024K-Byte——2KPage*512BytePerPage
四线模式:
/SEL,SCLK,SI,SO
时序:
TheSPISlaveDeviceisaccessedviatheSIpin,withdatabeingclockedintherisingedgeoftheSCLK.The/SELpinmustbelowfortheentireoperation.
Table1-1containsalistofpossibleinstructionbytesandformatfordeviceoperation.Allinstructions,addressesanddataaretransferredMSBfirst,LSBlast.
Table1-1
7
6
5
4
3
2
1
AccessMode
AccessType
RegisterAddress[5..0]
AccessRegister
ReadAccess
WriteAccess
A19
A18
A17
A16
SRAMByteOperation
SRAMPAGEOperation
SRAMSequentialOperation
Note:
A19=0,PingSramAccess;
A19=1,PongSramAccess
ModesofRegisterOperation
Thereare6416-BitsGeneralpurposeregisterswhichcanberead/writtenviathespiinterfaceandoneread-onlyByteregister---SPIS_ST(SPISlaveStatus)
Table2-1
Name
ADDR
Width
Description
SPIS_ST
N
8
SPISlaveStatus
REG0
0x00
16
命令类型datarate_choose[4:
2]mode[1]sStart[0]
REG1
0x01
设备序列号
REG2
0x02
同步
REG3
0x03
REG4
0x04
第五通道的采样速率
REG5
0x05
第六通道的采样速率
REG6
0x06
第七通道的采样速率
REG7
0x07
第八通道的采样速率
REG8
0x08
第一通道的增益设置
REG9
0x09
第二通道的增益设置
REG10
0x0A
第三通道的增益设置
REG11
0x0B
第四通道的增益设置
REG12
0x0C
第五通道的增益设置
REG13
0x0D
第六通道的增益设置
REG14
0x0E
第七通道的增益设置
REG15
0x0F
第八通道的增益设置
REG16
0x10
TBD
REG17
0x11
REG18
0x12
REG19
0x13
REG20
0x14
REG21
0x15
REG22
0x16
REG23
0x17
REG24
0x18
REG25
0x19
REG26
0x1A
REG27
0x1B
REG28
0x1C
REG29
0x1D
REG30
0x1E
REG31
0x1F
REG32
0x20
REG33
0x21
REG34
0x22
REG35
0x23
REG36
0x24
REG37
0x25
REG38
0x26
REG39
0x27
REG40
0x28
REG41
0x29
REG42
0x2A
REG43
0x2B
REG44
0x2C
REG45
0x2D
REG46
0x2E
REG47
0x2F
REG48
0x30
REG49
0x31
REG50
0x32
REG51
0x33
REG52
0x34
REG53
0x35
REG54
0x36
REG55
0x37
REG56
0x38
REG57
0x39
REG58
0x3A
REG59
0x3B
REG60
0x3C
REG61
0x3D
REG62
0x3E
REG63
0x3F
Table2-2
SPIS_STRegister
NAME
RegisterWriteAccess
RegisterReadAccess
ModesofSRAMOperation
512K*16bits,PingChip
512K*16bits,PongChip
2048Page,512BytesperPage
AccessAddressRange:
0x00000~0x3FFFF
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Null
SRAMAccessComm
PageAddress
15
14
13
12
11
10
9
ByteAddress
SRAMByteWriteAccess
Thewriteoperationsarelimitedtoonlyonebyte.TheCommandfollowedbythe16-bitaddressisclockedintothespislavedeviceandthedatafromthespislavedeviceistransformedonthenext8clocks.
SRAMByteReadAccess
TheReadoperationsarelimitedtoonlyonebyte.TheCommandfollowedbythe16-bitaddressisclockedintothespislavedeviceandthedatatothespislavedeviceistransformedonthenext8clocks.
SRAMPageWriteAccess
Thewriteoperationsarelimitedtowithintheaddressedpage(theaddressisautomaticallyincrementedinternally).Ifthedatabeingwrittenreachesthepageboundary,thentheinternaladdresscounterwillincrementtothestartofthepage.
SRAMPageReadAccess
TheReadoperationsarelimitedtowithintheaddressedpage(theaddressisautomaticallyincrementedinternally).Ifthedatabeingreadreachesthepageboundary,thentheintern