多通道数据采集卡FPGA设计文档汇编Word格式.docx

1、1 Sram_dout 与 Sram_din两个箭头方向换了一下，方便程序阅读；2 SPI_slave_Mgnt与Clock_Mgnt之间增加datarate_choose2:1,方向从SPI_Slave_Mgnt到Clock_Mgnt。FPGA功能实现SPI Slave ManagementCortex-M3设置为SPI Master模式，FPGA实现SPI Slave的功能可以完成寄存器、SRAM的访问SPI SlaveRegisters：64*16BitsSRAM：1024K-Byte2K Page*512 Byte Per Page四线模式:/SEL，SCLK，SI，SO时序： The

2、 SPI Slave Device is accessed via the SI pin, with data being clocked in the rising edge of the SCLK. The /SEL pin must be low for the entire operation.Table 1-1 contains a list of possible instruction bytes and format for device operation. All instructions, addresses and data are transferred MSB fi

3、rst, LSB last.Table 1-17654321Access ModeAccess TypeRegister Address5.0Access RegisterRead AccessWrite AccessA19A18A17A16SRAM Byte OperationSRAM PAGE OperationSRAM Sequential OperationNote: A19=0，Ping Sram Access ；A19 =1 ， Pong Sram AccessModes of Register OperationThere are 64 16-Bits General purpo

4、se registers which can be read/written via the spi interface and one read-only Byte register-SPIS_ST （SPI Slave Status）Table 2-1NameADDRWidthDescriptionSPIS_STN8SPI Slave StatusREG00x0016命令类型 datarate_choose4:2mode1 sStart0REG10x01设备序列号REG20x02同步REG30x03REG40x04第五通道的采样速率REG50x05第六通道的采样速率REG60x06第七通道

5、的采样速率REG70x07第八通道的采样速率REG80x08第一通道的增益设置REG90x09第二通道的增益设置REG100x0A第三通道的增益设置REG110x0B第四通道的增益设置REG120x0C第五通道的增益设置REG130x0D第六通道的增益设置REG140x0E第七通道的增益设置REG150x0F第八通道的增益设置REG160x10TBDREG170x11REG180x12REG190x13REG200x14REG210x15REG220x16REG230x17REG240x18REG250x19REG260x1AREG270x1BREG280x1CREG290x1DREG300x

6、1EREG310x1FREG320x20REG330x21REG340x22REG350x23REG360x24REG370x25REG380x26REG390x27REG400x28REG410x29REG420x2AREG430x2BREG440x2CREG450x2DREG460x2EREG470x2FREG480x30REG490x31REG500x32REG510x33REG520x34REG530x35REG540x36REG550x37REG560x38REG570x39REG580x3AREG590x3BREG600x3CREG610x3DREG620x3EREG630x3FT

7、able2-2SPIS_ST RegisterNAMERegister Write AccessRegister Read AccessModes of SRAM Operation512K*16bits，Ping Chip 512K*16bits，Pong Chip2048 Page,512 Bytes per PageAccess Address Range: 0x000000x3FFFF313029282726252423222120191817NullSRAM Access CommPage Address1514131211109Byte AddressSRAM Byte Write

8、 AccessThe write operations are limited to only one byte. The Command followed by the 16-bit address is clocked into the spi slave device and the data from the spi slave device is transformed on the next 8 clocks.SRAM Byte Read AccessThe Read operations are limited to only one byte. The Command foll

9、owed by the 16-bit address is clocked into the spi slave device and the data to the spi slave device is transformed on the next 8 clocks.SRAM Page Write AccessThe write operations are limited to within the addressed page（the address is automatically incremented internally）.If the data being written

10、reaches the page boundary ,then the internal address counter will increment to the start of the page.SRAM Page Read AccessThe Read operations are limited to within the addressed page（the address is automatically incremented internally）.If the data being read reaches the page boundary ,then the intern