数字电路与逻辑设计13PPT课件下载推荐.ppt

数字电路与逻辑设计13PPT课件下载推荐.ppt

《数字电路与逻辑设计13PPT课件下载推荐.ppt》由会员分享，可在线阅读，更多相关《数字电路与逻辑设计13PPT课件下载推荐.ppt（35页珍藏版）》请在冰豆网上搜索。

,DigitalFundamentalsTenthEditionFloyd,Chapter13,2008PearsonEducation,Summary,ComputerBlockDiagram,Thecentralprocessingunit（CPU）controlstheoperationsbyissuingafetchtomemoryforaninstruction,thenexecutesit.,MemorystoresinstructionsanddatauntilneededbytheCPU.,TheportsaretheI/Oconnectionstotheperipherals.,Thebusesaregroupsofconductorswithacommonpurpose.,Peripheralsaredevicesforinputtingoroutputtinginformation.,Summary,Software,Softwareisalloftheinstructionsthatdeterminewhatoperationsareperformed.,Systemsoftwareistheoperatingsystemofthecomputerandactsasthesystemmanager.,Applicationsoftwareincludesthevariousprogramsusedtoaccomplishatask.,TheBIOSisaportionoftheoperatingsystemcalled“firmware”becauseitisapermanentpartofthesystemsoftwareinROM（read-onlymemory）.,Summary,Microprocessors,Fourblocksarecommontoallmicroprocessors.Theseare:

@#@,ALUPerformsarithmeticandlogicoperations,InstructiondecoderTranslatestheprogramminginstructionintoanaddresswheremicrocoderesidesforexecutingtheinstructionRegisterarrayAgroupoftemporarystoragelocationswithintheprocessor,eachwithspecialfeaturesControlunitSynchronizestheprocessingofinstructions,Arithmeticlogicunit（ALU）,Instructiondecoder,Registerarray,Controlunit,Microprocessor,Summary,MicroprocessorBuses,Threebusesformicroprocessorsallowdata,addressesandinstructionstobemoved.,Theaddressbusisusedbythemicroprocessortospecifyalocationinmemoryorexternaldevice.Someprocessorshave64addresslinesandcanaccess1.8x1019locations.,ThedatabustransfersdataandinstructioncodestoandfrommemoryandI/Oports.,Thecontrolbuscoordinatesoperationsandcommunicateswithexternaldevices.,Summary,MicroprocessorProgramming,Microprocessorsworkwithaninstructionsetthatallowsittofunction.Althoughtheinstructionsetwithintheprocessorisbinary,programmersworkwithEnglish-likecommands,whicharedividedintosevengroups.Theseare:

@#@,DatatransferArithmeticandlogicBitmanipulationLoopsandjumpsStringsSubroutinesandinterruptsControl,Summary,MulticoreProcessors,TheIntelmicroprocessorsupthroughthePentiumwereallsinglecoreprocessors,meaningtheyhadonlyonemicroprocessorinanIC.,ManynewerprocessorshavemorethanonecoreonasingleIC.Multicoreprocessorscanexecutemorethanoneinstructionatatime.Thisprocessisalsocalledmultiprocessing.,Systembus,Processorcore,Processorcore,Cache,Cache,twoprocessorsworkonanimageatthesametimetoadjustthecontrast.Theworkissectionedsothateachprocessorworksononlyonepart.,Example,Anexampleofmultiprocessingiswhen,Summary,Multitasking,Multitaskingisatechniquethatallowsacomputertoperformmorethanonetask.Unlikemultiprocessing,theworkonlyappearstobesimultaneousbecauseofthespeedoftheprocessor.,Onetypeofmultitaskingparcelstimeslicesontheprocessorforeachprogramthisiscalledpreemptivemultitasking.Anothertypeofmultitaskingisdonewhentheprogramcontrolstheprocessorthisiscalledcooperativemultitasking.,Multithreadingisavariationonmultitasking,wheredifferentpartsofthesameprogramareexecutedsimultaneously.,Summary,Operations,Microprocessorsexecuteprogramsbyrepeatedlycyclingthroughthreebasicsteps:

@#@,ExecutionunitEU,Executesinstructions,BusinterfaceunitBIU,Fetchesinstructions,Readsoperands,Writesresults,Systembuses,8086/8088Microprocessor,FetchDecodeExecute,Theprocessorhastwointernalunits,theEUandtheBIU,asshowninthefigure:

@#@,Summary,Operations,WhiletheEUisexecutinginstructions,theBIUisfetchingthenextinstructionfrommemory,andstoringthenextinstructioninahighspeedmemorycalledthecache.,ExecutionunitEU,Executesinstructions,BusinterfaceunitBIU,Fetchesinstructions,Readsoperands,Writesresults,Systembuses,8086/8088Microprocessor,InthePentiumprocessors,twoexecutionunits（EUs）allowinstructionsthatareindependentofeachothertoexecuteatthesametime.,Thefollowingslideshowsthearchitectureofthe8088processor,Summary,Summary,Addressing,Intelchoseainnovativewayofgenerating20-bitphysicaladdressesinthe8088andsubsequentprocessors.,Thephysicaladdressisformedbycombininga16-bitaddressinasegmentregisterwitha16-bitaddressinageneralregister.Theaddresses“overlap”asshown,withanimplied00002ontherightsideofthesegmentregister（showninblue）.,16-bitsegmentbaseaddress,16-bitoffsetaddress,20-bitphysicaladdress,Segmentregister,Generalregister,Summary,Addressing,Segment/offsetaddressingallows64kblocksofcodetoberelocatedinmemorybychangingonlythesegmentaddress.,Example,AssumeIP=20A016andCS=B20016.Whatisthelocationofthestartandendoftheblock?

@#@Whatphysicaladdressisformed?

@#@,Solution,Theaddressingisdiagramed:

@#@,ContentsofCS,impl