STM32F407VGT6芯片管脚功能定义Word文档格式.docx

STM32F407VGT6芯片管脚功能定义Word文档格式.docx

《STM32F407VGT6芯片管脚功能定义Word文档格式.docx》由会员分享，可在线阅读，更多相关《STM32F407VGT6芯片管脚功能定义Word文档格式.docx（10页珍藏版）》请在冰豆网上搜索。

PC13

8

PC14-OSC32」N（PC14）

9

PC15-

OSC32_OUT（PC15）

10

VSS

11

VDD

12

PH0-OSC_IN

（PH0）

13

PH1-OSC_OUT

（PH1）

14

NRST

15

PC0

OTG_HS_ULPI_STP/EVENTOUT

16

PC1

ETHMDC/EVENTOUT

17

PC2

SPI2_MISO/OTG_HS_ULPI_DIR/

TH_MII_TXD2

/l2S2extSD/EVENTOUT

18

PC3

SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/EVENTOUT

19

20

VSSA

21

VREF+

22

VDDA

23

PA0-WKUP

（PA0）

USART2_CTS/UART4_TX/ETH_MII_CRS/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/EVENTOUT

24

PA1

USART2_RTS/

UART4_RX/ETH_RMII_REF_CLK/ETH_MII_RX_CLK/TIM5_CH2/TIMM2_CH2/EVENTOUT

25

PA2

USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/ETHMDIO/EVENTOUT

26

PA3

USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/ETH_MII_COL/EVENTOUT

27

28

29

PA4

SPI1_NSS/SPI3_NSS/

USART2_CK/

DCMI_HSYNC/

OTG_HS_SOF/I2S3_WS/

30

PA5

SPI1_SCK/

OTG_HS_ULPI_CK/

TIM2_CH1_ETR/

TIM8CHIN/EVENTOUT

31

PA6

SPI1_MISO/TIM8_BKIN/TIM13_CH1/DCMI_PIXCLK/TIM3_CH1/TIM1BKIN/EVENTOUT

32

PA7

SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/ETH_MII_RX_DV/TIM1_CH1N/RMII_CRS_DV/EVENTOUT

33

PC4

ETH_RMII_RX_D0/

ETH_MII_RX_D0/

34

PC5

ETH_RMII_RX_D1/

ETH_MII_RX_D1/

35

PB0

TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/

TIM1CH2N/EVENTOUT

36

PB1

TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH_MII_RXD3/OTG_HS_INTN/

TIM1CH3N/EVENTOUT

37

PB2-BOOT1

（PB2）

38

PE7

FSMC_D4/TIM1_ETR/

39

PE8

FSMC_D5/TIM1_CH1N/

40

PE9

FSMC_D6/TIM1_CH1/

41

PE10

FSMC_D7/TIM1_CH2N/

42

PE11

FSMCD8/TIM1CH2/EVENTOUT

43

PE12

FSMC_D9/TIM1_CH3N/

44

PE13

FSMC_D10/TIM1_CH3/

45

PE14

FSMC_D11/TIM1_CH4/

46

PE15

FSMC_D12/TIM1_BKIN/

47

PB10

SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER/TIM2CH3/EVENTOUT

48

PB11

I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_RMII_TX_EN/ETHMIITXEN/

TIM2_CH4/EVENTOUT

49

VCAP_1

50

51

PB12

SPI2_NSS/I2S2_WS/

I2C2_SMBA/

USART3_CK/TIM1_BKIN/

CAN2_RX/OTG_HS_ULPI_D5/ETH_RMII_TXD0/

ETH_MII_TXD0/

OTGHSID/EVENTOUT

52

PB13

SPI2_SCK/I2S2_CK/

USART3_CTS/

TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/ETH_RMII_TXD1/ETH_MII_TXD1/EVENTOUT

53

PB14

SPI2_MISO/TIM1_CH2N/

TIM12_CH1/

OTG_HS_DM/

USART3_RTS/

TIM8_CH2N/l2S2ext_SD/EVENTOUT

54

PB15

SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/

OTGHSDP/EVENTOUT

55

PD8

FSMC_D13/USART3_TX/EVENTOUT

56

PD9

FSMC_D14/USART3_RX/

57

PD10

FSMC_D15/USART3_CK/

58

PD11

FSMC_CLE/

FSMC_A16/USART3_CTS/

59

PD12

FSMC_ALE/

FSMC_A17/TIM4_CH1/

USART3_RTS/

60

PD13

FSMC_A18/TIM4_CH2/

61

PD14

FSMC_D0/TIM4_CH3/

EVENTOUT/EVENTOUT

62

PD15

FSMC_D1/TIM4_CH4/

63

PC6

I2S2_MCK/

TIM8_CH1/SDIO_D6/

USART6_TX/

DCMI_D0/TIM3_CH1/

64

PC7

I2S3_MCK/

TIM8_CH2/SDIO_D7/USART6_RX/

DCMI_D1/TIM3_CH2/

65

PC8

TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/DCMID2/EVENTOUT

66

PC9

I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1//I2C3_SDA/DCMI_D3/TIM3CH4/EVENTOUT

67

PA8

MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF/EVENTOUT

68

PA9

USART1_TX/TIM1_CH2/

I2C3_SMBA/DCMI_D0/

69

PA10

USART1_RX/TIM1_CH3/

OTG_FS_ID/DCMI_D1/

70

PA11

USART1_CTS/CAN1_RX/TIM1_CH4/

OTGFSDM/EVENTOUT

71

PA12

USART1_RTS/CAN1_TX/

TIM1_ETR/OTG_FS_DP/EVENTOUT

72

JTMS-SWDIO）

JTMS-SWDIO/EVENTOUT

73

VCAP2

74

75

76

PA14

JTCK-SWCLK/EVENTOUT

（JTCK-SWCLK）

77

PA15

（JTDI）

JTDI/SPI3_NSS/

I2S3_WS/TIM2_CH1_ETR/SPI1NSS/EVENTOUT

78

PC10

SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/DCMI_D8/USART3_TX/EVENTOUT

79

PC11

UART4_RX/SPI3_MISO/

SDIO_D3/

DCMI_D4/USART3_RX/l2S3extSD/EVENTOUT

80

PC12

UART5_TX/SDIO_CK/DCMI_D9/SPI3_MOSI/I2S3_SD/USART3_CK/EVENTOUT

81

PD0

FSMC_D2/CAN1_RX/

82

PD1

FSMC_D3/CAN1_TX/

83

PD2

TIM3_ETR/UART5_RX/

SDIO_CMD/DCMI_D11/

84

PD3

FSMC_CLK/USART2_CTS

/EVENTOUT

85

PD4

FSMC_NOE/USART2_RTS

86

PD5

FSMC_NWE/USART2_TX/

87

PD6

FSMC_NWAIT/

USART2RX/EVENTOUT

88

PD7

USART2_CK/FSMC_NE1/

FSMCNCE2/EVENTOUT

89

PB3（JTDO/TRACESWO）

JTDO/TRACESWO/

SP