自动化专业毕业设计翻译正文.docx

自动化专业毕业设计翻译正文.docx

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自动化专业毕业设计翻译正文

UniversalSerialCommunicationInterface–SPIMode

Theuniversalserialcommunicationinterface（USCI）supportsmultipleserialcommunicationmodeswithonehardwaremodule.Thischapterdiscussestheoperationofthesynchronousperipheralinterface（SPI）

16.1mode.UniversalSerialCommunicationInterface（USCI）Overview

Theuniversalserialcommunicationinterface（USCI）modulessupportmultipleserialcommunicationmodes.DifferentUSCImodulessupportdifferentmodes.EachdifferentUSCImoduleisnamedwithadifferentletter.Forexample,USCI_AisdifferentfromUSCI_B,etc.IfmorethanoneidenticalUSCImoduleisimplementedononedevice,thosemodulesarenamedwithincrementingnumbers.Forexample,ifonedevicehastwoUSCI_Amodules,theyarenamedUSCI_A0andUSCI_A1.Seethedevice-specificdatasheettodeterminewhichUSCImodules,ifany,areimplementedonwhichdevices.

USCI_Axmodulessupport:

•UARTmode

•PulseshapingforIrDAcommunications

•Automaticbaud-ratedetectionforLINcommunications

•SPImode

USCI_Bxmodulessupport:

•

mode

•SPImode

16.2USCIIntroduction–SPIMode

Insynchronousmode,theUSCIconnectsthedevicetoanexternalsystemviathreeorfourpins:

UCxSIMO,UCxSOMI,UCxCLK,andUCxSTE.SPImodeisselectedwhentheUCSYNCbitisset,andSPImode（3-pinor4-pin）isselectedwiththeUCMODExbits.

SPImodefeaturesinclude:

•7-bitor8-bitdatalength

•LSB-firstorMSB-firstdatatransmitandreceive

•3-pinand4-pinSPIoperation

•Masterorslavemodes

•Independenttransmitandreceiveshiftregisters

•Separatetransmitandreceivebufferregisters

•Continuoustransmitandreceiveoperation

•Selectableclockpolarityandphasecontrol

•Programmableclockfrequencyinmastermode

•Independentinterruptcapabilityforreceiveandtransmit

•SlaveoperationinLPM4

Figure16-1showstheUSCIwhenconfiguredforSPImode.

16.3USCIOperation–SPIMode

InSPImode,serialdataistransmittedandreceivedbymultipledevicesusingasharedclockprovidedbythemaster.Anadditionalpin,UCxSTE,isprovidedtoenableadevicetoreceiveandtransmitdataandiscontrolledbythemaster.

ThreeorfoursignalsareusedforSPIdataexchange:

•UCxSIMOslavein,masteroutMastermode:

UCxSIMOisthedataoutputline.Slavemode:

UCxSIMOisthedatainputline.

•UCxSOMIslaveout,masterinMastermode:

UCxSOMIisthedatainputline.Slavemode:

UCxSOMIisthedataoutputline.

•UCxCLKUSCISPIclockMastermode:

UCxCLKisanoutput.Slavemode:

UCxCLKisaninput.

•UCxSTEslavetransmitenable.Usedin4-pinmodetoallowmultiplemastersonasinglebus.Notusedin3-pinmode.Table16-1describestheUCxSTEoperation.

16.3.1USCIInitializationandReset

TheUSCIisresetbyaPUCorbytheUCSWRSTbit.AfteraPUC,theUCSWRSTbitisautomaticallyset,keepingtheUSCIinaresetcondition.Whenset,theUCSWRSTbitresetstheUCRXIE,UCTXIE,UCRXIFG,UCOE,andUCFEbits,andsetstheUCTXIFGflag.ClearingUCSWRSTreleasestheUSCIforoperation.

Note:

InitializingorreconfiguringtheUSCImodule

TherecommendedUSCIinitialization/reconfigurationprocessis:

1.SetUCSWRST（BIS.B#UCSWRST,&UCxCTL1）.

2.InitializeallUSCIregisterswithUCSWRST=1（includingUCxCTL1）.

3.Configureports.

4.ClearUCSWRSTviasoftware（BIC.B#UCSWRST,&UCxCTL1）.

5.Enableinterrupts（optional）viaUCRXIEand/orUCTXIE.

16.3.2CharacterFormat

TheUSCImoduleinSPImodesupports7-bitand8-bitcharacterlengthsselectedbytheUC7BITbit.In7-bitdatamode,UCxRXBUFisLSBjustifiedandtheMSBisalwaysreset.TheUCMSBbitcontrolsthedirectionofthetransferandselectsLSBorMSBfirst.

Note:

Defaultcharacterformat

ThedefaultSPIcharactertransmissionisLSBfirst.ForcommunicationwithotherSPIinterfaces,MSB-firstmodemayberequired.

Note:

CharacterformatforFigures

FiguresthroughoutthischapteruseMSB-firstformat.

16.3.3MasterMode

Figure16-2showstheUSCIasamasterinboth3-pinand4-pinconfigurations.TheUSCIinitiatesdatatransferwhendataismovedtothetransmitdatabufferUCxTXBUF.TheUCxTXBUFdataismovedtothetransmit（TX）shiftregisterwhentheTXshiftregisterisempty,initiatingdatatransferonUCxSIMOstartingwitheithertheMSBorLSB,dependingontheUCMSBsetting.DataonUCxSOMIisshiftedintothereceiveshiftregisterontheoppositeclockedge.Whenthecharacterisreceived,thereceivedataismovedfromthereceive（RX）shiftregistertothereceiveddatabufferUCxRXBUFandthereceiveinterruptflagUCRXIFGisset,indicatingtheRX/TXoperationiscomplete.

Asettransmitinterruptflag,UCTXIFG,indicatesthatdatahasmovedfromUCxTXBUFtotheTXshiftregisterandUCxTXBUFisreadyfornewdata.ItdoesnotindicateRX/TXcompletion.

ToreceivedataintotheUSCIinmastermode,datamustbewrittentoUCxTXBUF,becausereceiveandtransmitoperationsoperateconcurrently.

16.3.4SlaveMode

Figure16-3showstheUSCIasaslaveinboth3-pinand4-pinconfigurations.UCxCLKisusedastheinputfortheSPIclockandmustbesuppliedbytheexternalmaster.Thedata-transferrateisdeterminedbythisclockandnotbytheinternalbitclockgenerator.DatawrittentoUCxTXBUFandmovedtotheTXshiftregisterbeforethestartofUCxCLKistransmittedonUCxSOMI.DataonUCxSIMOisshiftedintothereceiveshiftregisterontheoppositeedgeofUCxCLKandmovedtoUCxRXBUFwhenthesetnumberofbitsarereceived.WhendataismovedfromtheRXshiftregistertoUCxRXBUF,theUCRXIFGinterruptflagisset,indicatingthatdatahasbeenreceived.TheoverrunerrorbitUCOEissetwhenthepreviouslyreceiveddataisnotreadfromUCxRXBUFbeforenewdataismovedtoUCxRXBUF.

16.3.5SPIEnable

WhentheUSCImoduleisenabledbyclearingtheUCSWRSTbit,itisreadytoreceiveandtransmit.Inmastermode,thebitclockgeneratorisready,butisnotclockednorproducinganyclocks.Inslavemode,thebitclockgeneratorisdisabledandtheclockisprovidedbythemaster.

AtransmitorreceiveoperationisindicatedbyUCBUSY=1.

APUCorsetUCSWRSTbitdisablestheUSCIimmediatelyandanyactivetransferisterminated.

TransmitEnable

Inmastermode,writingtoUCxTXBUFactivatesthebitclockgenerator,andthedatabeginstotransmit.

Inslavemode,transmissionbeginswhenamasterprovidesaclockand,in4-pinmode,whentheUCxSTEisintheslave-activestate.

ReceiveEnable

TheSPIreceivesdatawhenatransmissionisactive.Receiveandtransmitoperationsoperateconcurrently.

16.3.6SerialClockControl

UCxCLKisprovidedbythemasterontheSPIbus.WhenUCMST=1,thebitclockisprovidedbytheUSCIbitclockgeneratorontheUCxCLKpin.TheclockusedtogeneratethebitclockisselectedwiththeUCSSELxbits.WhenUCMST=0,theUSCIclockisprovidedontheUCxCLKpinbythemaster,thebitclockgeneratorisnotused,andtheUCSSELxbitsaredon'tcare.TheSPIreceiverandtransmitteroperateinparallelandusethesameclocksourcefordatatransfer.

The16-bitvalueofUCBRxinthebitratecontrolregisters（UCxxBR1andUCxxBR0）isthedivisionfactoroftheUSCIclocksource,BRCLK.ThemaximumbitclockthatcanbegeneratedinmastermodeisBRCLK.ModulationisnotusedinSPImode,andUCAxMCTLshouldbeclearedwhenusingSPImodeforUSCI_A.TheUCAxCLK/UCBxCLKfrequencyisgivenby:

=

/UCBRx

SerialClockPolarityandPhase

ThepolarityandphaseofUCxCLKareindependentlyconfiguredviatheUCCKPLandUCCKPHcontrolbitsoftheUSCI.TimingforeachcaseisshowninFigure16-4.

16.3.7UsingtheSPIModeWithLow-PowerModes

TheUSCImoduleprovidesautomaticclockactivationforusewithlow-powermodes.WhentheUSCIclocksourceisinactivebecausethedeviceisinalow-powermode,theUSCImoduleautomaticallyactivatesitwhenneeded,regardlessofthecontrol-bitsettingsfortheclocksource.TheclockremainsactiveuntiltheUSCImodulereturnstoitsidlecondition.AftertheUSCImodulereturnstotheidlecondition,controloftheclocksourcerevertstothesettingsofitscontrolbits.

InSPIslavemode,nointernalclocksourceisrequiredbecausetheclockisprovidedbytheexternalmaster.ItispossibletooperatetheUSCIinSPIslavemodewhilethedeviceisinLPM4andallclocksourcesaredisabled.ThereceiveortransmitinterruptcanwakeuptheCPUfromanylow-powermode.

16.3.8SPIInterrupts

TheUSCIhasonlyoneinterruptvectorthatissharedfortransmissionandforreception.USCI_AxandUSC_Bxdonotsharethesameinterruptvector.

SPITransmitInterruptOperation

TheUCTXIFGinterruptflagissetbythetransmittertoindicatethatUCxTXBUFisreadytoacceptanothercharacter.AninterruptrequestisgeneratedifUCTXIEandGIEarealsoset.UCTXIFGisautomaticallyresetifacharacteriswrittentoUCxTXBUF.UCTXIFGissetafteraPUCorwhenUCSWRST=1.UCTXIEisresetafteraPUCorwhenUCSWRST=1.

Note:

WritingtoUCxTXBUFinSPImode

DatawrittentoUCxTXBUFwhenUCTXIFG=0mayresultinerroneousdatatransmission.

SPIReceiveInterruptOperation

TheUCRXIFGinterruptflagisseteachtimeacharacterisreceivedandloadedintoUCxRXBUF.AninterruptrequestisgeneratedifUCRXIEandGIEarealsoset.UCRXIFGandUCRXIEareresetbyasystemresetPUCsignalorwhenUCSWRST=1.UCRXIFGisautomaticallyresetwhenUCxRXBUFisread.

UCxIV,InterruptVectorGenerator

TheUSCIinterruptflagsareprioritizedandcombinedtosourceasingleinterruptvector.TheinterruptvectorregisterUCxIVisusedtodeterminewhichflagrequestedaninterrupt.Thehighest-priorityenabledinterruptgeneratesanumberintheUCxIVregisterthatcanbeevaluatedoraddedtotheprogramcounter