flashmemory测试简介.ppt

1、Memory 测试原理,Unit 1:Introduction to Flash Technology,Overview of Memory Devices,Nonvolatile,RAM,DRAM,SRAM,EEPROM,ROM,EPROM,PROM,Volatile,FLASH,Course Contents,Two Basic Memory Categories,Volatile Memory 易挥发存储器Data is lost when power is removed.Nonvolatile Memory非易挥发存储器Data remains even when power is

2、removed.,Volatile Memory,RAM Random Access MemorySRAM-Static RAM is commonly used as 640 Kb cache memory in computers.DRAM-Dynamic RAM is commonly used for read-write memory in computers.,Nonvolatile Memory,ROM Read Only Memory,ROM,are programmed in a wafer fab and cannot be erased or reprogrammed i

3、n the field.PROM Programmable ROM can be reprogrammed in the field by applying larger voltages with special equipment.EPROM Erasable PROM can be erased with UV light and reprogrammed with special equipment.EEPROM Electrically Erasable PROM can be erased with higher voltages and reprogrammed in the f

4、ield.,Nonvolatile Memory,NVRAM Nonvolatile RAM(Flash)is smaller than PROMs,less expensive,and easier to program and erase.Magnetic Magnetic disk and tape can be easily programmed and erased by user,but are slower than Flash.Optical CD ROM can be easily programmed by user but is slower than Flash.,Be

5、nefits of Flash Memory Chips,Smaller than EPROMS and EEPROMSRequires only one transistor and a storage capacitor per bit cell.Can be quickly and easily erased and reprogrammed without the need of special equipment.Excellent for use in cell phones,pagers,calculators,portable digital devices,automotiv

6、e,flight data recorders,and personal computers.,Simple ROM Memory Array,Simple DRAM Memory Array,Capacitorcharged,No current,“0”,Capacitoruncharged,Current flow,“1”,Activate Row to readIf capacitor was charged,no current flows on bit lineIf capacitor not charged,current flows on bit lineBuffer on co

7、lumn sense amps,Simple EPROM Memory Array,A second“floating gate”serves as the storage element in an EPROM.,Floating Gate,Source,Gate,Floating Gate(electrically isolated)is the storage element charged=“programmed”neutral=“erased”,Basic Flash Memory Cell,Flash Cell Structure-Similar to EPROM,except E

8、lectrically-erasable,p+Substrate,Control Gate,Floating Gate,Flash Cell Operation-Program Mode Channel Hot-Electron Injection,GND,VG=+9.3V,VD=+4.5V,Source,Drain,Flash Cell Operation-Program ModeChannel Hot-electron Injection,GND,VG=+9.3V,VD=+4.5V,Source,Drain,p+Substrate,Control Gate,Floating Gate,e-

9、,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,Flash Cell Operation-Program ModeIDS Conduction&Floating Gate Charge(Q),p+Substrate,GND,VG=+9.3V,VD=+4.5V,Control Gate,Floating Gate,Source,Drain,Logic state“0”,Flash Cell Operation-Erase ModeNegative Gate-FN Tunneling,p+Substrate,Control Gate,e-,e-,e-,e-,e-,e

10、-,e-,e-,e-,e-,e-,e-,e-,e-,e-,Electrically-erasable charge from gate,Source,Drain,Logic state“1”,Flash Memory Bit Threshold Voltages,Flash Array Architecture(schematic),Core memory(core),Flash Array Cell Addressing,Row Decoder,Column Decoder,Source Switch,Basic Memory Device Internal Architecture,1,1

11、,1,1,0,0,0,0,0,0,0,0,0,0,0,0,A0,A1,A2,A3,A4,A5,A6,A7,Memory cell,Memory Cell block:每个CELL存储 data（1/0）Address Decoder Circuitry：地址译码 以(A0)来选择不同的memory cell or block进行读写操作。Input/Output I/O)circuitry：是memory Cell 和外界的输入输出接口，将data 在(D0)与Cell间传输。Control Circuitry：控制memory Cell 工作状态的电路 CE/OE/WE(Chip Enabl

12、e/Output Enable/Write Enable),Unit 2:Device Testing DC parametric testAC parametric testFunctional Test,DC parametric test,ISVM：Force current message voltageVSIM:Force voltage message current,DC Parametric Tests：测试 Address Decoder 和 I/O 回路 中Input/Output Buffer的DC特性。在DC Test中一般使用 VSIM 及ISVM 的方法。,DC C

13、ontact Check 开路/短路测试 OPEN/SHORTInput/Output Leakage Check 输入/输出漏电流测试 INLEAK/OUTLEAK CMOS Automatic Sleep CMOS自动睡眠模式电流测试 CMOSASM Standby Current Check Device不工作时待机电流测试 ICCSBOutput Drive Voltage&Current Device 电压及电流驱动能力测试 VOH/VOL,DC Parametric Test OPEN/SHOR TestINLEAK/OUTLEAK TestCMOSASMICCSB TestVOH

14、/VOL Test,Open Test,Purpose:测量 device pins 是否 correctly to DUT/Tester channel 测量 Device内部 管脚是否有开路。,Ground all pins(including VCC);Set Voltage Clamp 3.0 volts;Using PMU,force positive or negative current,one pin at a time;Measure resultant voltage;Fails test(open)if the absolute voltage measured is g

15、reater than 1.5V;,Test Method,Short Test,Purpose:测试 the device pins 是否有短路 Test Method:,Ground all pins(including VCC);Set Voltage Clamp 3.0 volts;Using PMU,force positive or negative Voltage,one pin at a time;Measure resultant current;Fails test(short)if the absolute voltage measured is less than 0.

16、2V.,Definition,IIL-Input leakage lowThe current in an input when it is forced low voltage.,IIH-Input leakage highThe current in an input when it is forced high voltage.,Why test?The IIL test measures the resistance from an input pin to VCC,IIH test measures the resistance from an input pin to VSS.The test insures that the input buffers offer a high resistance when apply 0v and VCC.,Input Leakage Test(INLEAK),Input Leakage Low Test-IIL,Test Method,Apply VCCmax.Preconditioning all inputs to logic