flashmemory测试简介.ppt
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Memory测试原理,Unit1:
IntroductiontoFlashTechnology,OverviewofMemoryDevices,Nonvolatile,RAM,DRAM,SRAM,EEPROM,ROM,EPROM,PROM,Volatile,FLASH,CourseContents,TwoBasicMemoryCategories,VolatileMemory易挥发存储器Dataislostwhenpowerisremoved.NonvolatileMemory非易挥发存储器Dataremainsevenwhenpowerisremoved.,VolatileMemory,RAMRandomAccessMemorySRAM-StaticRAMiscommonlyusedas640Kbcachememoryincomputers.DRAM-DynamicRAMiscommonlyusedforread-writememoryincomputers.,NonvolatileMemory,ROMReadOnlyMemory,ROM,areprogrammedinawaferfabandcannotbeerasedorreprogrammedinthefield.PROMProgrammableROMcanbereprogrammedinthefieldbyapplyinglargervoltageswithspecialequipment.EPROMErasablePROMcanbeerasedwithUVlightandreprogrammedwithspecialequipment.EEPROMElectricallyErasablePROMcanbeerasedwithhighervoltagesandreprogrammedinthefield.,NonvolatileMemory,NVRAMNonvolatileRAM(Flash)issmallerthanPROMs,lessexpensive,andeasiertoprogramanderase.MagneticMagneticdiskandtapecanbeeasilyprogrammedanderasedbyuser,butareslowerthanFlash.OpticalCDROMcanbeeasilyprogrammedbyuserbutisslowerthanFlash.,BenefitsofFlashMemoryChips,SmallerthanEPROMSandEEPROMSRequiresonlyonetransistorandastoragecapacitorperbitcell.Canbequicklyandeasilyerasedandreprogrammedwithouttheneedofspecialequipment.Excellentforuseincellphones,pagers,calculators,portabledigitaldevices,automotive,flightdatarecorders,andpersonalcomputers.,SimpleROMMemoryArray,SimpleDRAMMemoryArray,Capacitorcharged,Nocurrent,“0”,Capacitoruncharged,Currentflow,“1”,ActivateRowtoreadIfcapacitorwascharged,nocurrentflowsonbitlineIfcapacitornotcharged,currentflowsonbitlineBufferoncolumnsenseamps,SimpleEPROMMemoryArray,Asecond“floatinggate”servesasthestorageelementinanEPROM.,FloatingGate,Source,Gate,FloatingGate(electricallyisolated)isthestorageelementcharged=“programmed”neutral=“erased”,BasicFlashMemoryCell,FlashCellStructure-SimilartoEPROM,exceptElectrically-erasable,p+Substrate,ControlGate,FloatingGate,FlashCellOperation-ProgramModeChannelHot-ElectronInjection,GND,VG=+9.3V,VD=+4.5V,Source,Drain,FlashCellOperation-ProgramModeChannelHot-electronInjection,GND,VG=+9.3V,VD=+4.5V,Source,Drain,p+Substrate,ControlGate,FloatingGate,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,FlashCellOperation-ProgramModeIDSConduction&FloatingGateCharge(Q),p+Substrate,GND,VG=+9.3V,VD=+4.5V,ControlGate,FloatingGate,Source,Drain,Logicstate“0”,FlashCellOperation-EraseModeNegativeGate-FNTunneling,p+Substrate,ControlGate,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,Electrically-erasablechargefromgate,Source,Drain,Logicstate“1”,FlashMemoryBitThresholdVoltages,FlashArrayArchitecture(schematic),Corememory(core),FlashArrayCellAddressing,RowDecoder,ColumnDecoder,SourceSwitch,BasicMemoryDeviceInternalArchitecture,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,A0,A1,A2,A3,A4,A5,A6,A7,Memorycell,MemoryCellblock:
每个CELL存储data(1/0)AddressDecoderCircuitry:
地址译码以(A0)来选择不同的memorycellorblock进行读写操作。
Input/OutputI/O)circuitry:
是memoryCell和外界的输入输出接口,将data在(D0)与Cell间传输。
ControlCircuitry:
控制memoryCell工作状态的电路CE/OE/WE(ChipEnable/OutputEnable/WriteEnable),Unit2:
DeviceTestingDCparametrictestACparametrictestFunctionalTest,DCparametrictest,ISVM:
ForcecurrentmessagevoltageVSIM:
Forcevoltagemessagecurrent,DCParametricTests:
测试AddressDecoder和I/O回路中Input/OutputBuffer的DC特性。
在DCTest中一般使用VSIM及ISVM的方法。
DCContactCheck开路/短路测试OPEN/SHORTInput/OutputLeakageCheck输入/输出漏电流测试INLEAK/OUTLEAKCMOSAutomaticSleepCMOS自动睡眠模式电流测试CMOSASMStandbyCurrentCheckDevice不工作时待机电流测试ICCSBOutputDriveVoltage&CurrentDevice电压及电流驱动能力测试VOH/VOL,DCParametricTestOPEN/SHORTestINLEAK/OUTLEAKTestCMOSASMICCSBTestVOH/VOLTest,OpenTest,Purpose:
测量devicepins是否correctlytoDUT/Testerchannel测量Device内部管脚是否有开路。
Groundallpins(includingVCC);SetVoltageClamp3.0volts;UsingPMU,forcepositiveornegativecurrent,onepinatatime;Measureresultantvoltage;Failstest(open)iftheabsolutevoltagemeasuredisgreaterthan1.5V;,TestMethod,ShortTest,Purpose:
测试thedevicepins是否有短路TestMethod:
Groundallpins(includingVCC);SetVoltageClamp3.0volts;UsingPMU,forcepositiveornegativeVoltage,onepinatatime;Measureresultantcurrent;Failstest(short)iftheabsolutevoltagemeasuredislessthan0.2V.,Definition,IIL-InputleakagelowThecurrentinaninputwhenitisforcedlowvoltage.,IIH-InputleakagehighThecurrentinaninputwhenitisforcedhighvoltage.,Whytest?
TheIILtestmeasurestheresistancefromaninputpintoVCC,IIHtestmeasurestheresistancefromaninputpintoVSS.Thetestinsuresthattheinputbuffersofferahighresistancewhenapply0vandVCC.,InputLeakageTest(INLEAK),InputLeakageLowTest-IIL,TestMethod,ApplyVCCmax.Preconditioningallinputstologic