1、出租车计费器VHDL语言课件数字逻辑电路课程设计 出租车计费器的设计计算机学院 软件工程1401赵雷 3140608027出租车计费器的设计1、系统设计任务及要求(1)能实现计费功能,计费标准为:按行驶里程收费,起步价为7.00元,并在车行3千米后再按2元/千米,当总费用达到或超过40元时,每千米收费4元,客户端需要停车等待时按时间收费,计费单价每20秒1元。(2)设计动态扫描电路:以十进制显示出租车行驶的里程与车费,在数码管上显示(前四个显示里程,后三个显示车费)。(3)用VHDL语言设计符合上述功能要求的出租车计费器,并用层次化设计方法设计该电路。(4)完成电路全部设计后,通过系统试验箱下
2、载验证设计的正确性。2、系统设计方案根据系统设计设计要求不难得知,整个出租车计费系统按功能主要分为速度选择模块、计程模块、计时模块、计费模块4个模块。顶层原理图1.速度模块:通过对速度信号sp的判断,决定行使的路程,这里是通过速度信号来模拟一个变量的取值。如kinside变量,其含义是行进100m所需的时钟周期数,然后每行进100m,则产生一个脉冲clkout来驱动计费模块。VHDL语言:library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_unsigned.all;entity Taxi_part1 is port(clk,r
3、eset,start,stop:in std_logic; sp :in std_logic_vector(2 downto 0); clkout :out std_logic);end Taxi_part1;architecture behavior of Taxi_part1 isbegin process(clk,reset,stop,start,sp) type state_type is(s0,s1); variable s_state:state_type; variable cnt:integer range 0 to 1400; variable kinside:integer
4、 range 0 to 1400;begin case sp is when 000= kinside:=0; when 001= kinside:=1400; when 010= kinside:=1200; when 011= kinside:=1000; when 100= kinside:=800; when 101= kinside:=600; when 110= kinside:=400; when 111= kinside:=200; end case; if(reset=1) then s_state:=s0; elsif(clkevent and clk=1) then ca
5、se s_state is when s0= cnt:=0;clkout clkout=0; if(stop=1) then s_state:=s0; -相当于无客户上车 elsif(sp=000) then s_state:=s1; -有客户上车,但车速位0,即客户刚上车还未起步 elsif(cnt=kinside) then cnt:=0;clkout=1; s_state:=s1; else cnt:=cnt+1; s_state:=s1; end if; end case; end if; end process;end behavior;2.计程模块:由于一个clkout信号代表行进
6、100m,故通过对clkout计数,可以获得共行进的距离kmcount。VHDL语言:library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_unsigned.all;entity Taxi_part2 is port(clkout,reset:in std_logic; kmcnt1:out std_logic_vector(3 downto 0); kmcnt2:out std_logic_vector(3 downto 0); kmcnt3:out std_logic_vector(3 downto 0);end Taxi_
7、part2;architecture behavior of Taxi_part2 isbegin process(clkout,reset) variable km_reg:std_logic_vector(11 downto 0);begin if(reset=1) then km_reg:=000000000000; elsif(clkoutevent and clkout=1) then -km_reg(3 downto 0)对应里程十分位 if(km_reg(3 downto 0)=1001)then km_reg:=km_reg+0111; -十分位向个位的进位处理 else km
8、_reg(3 downto 0):=km_reg(3 downto 0)+0001; end if; if(km_reg(7 downto 4)=1010)then km_reg:=km_reg+01100000; -个位向十位的进位处理 end if;end if;kmcnt1=km_reg(3 downto 0);kmcnt2=km_reg(7 downto 4);kmcnt3 waittime:=0;timecount if(sp=000) then t_state:=t2; else waittime:=0;t_state:=t1; end if; when t2 = waittime
9、:=waittime+1; timecount=0; if(waittime=1000) then timecount=1; -20s,即1000个clk,产生一个时间计费脉冲 waittime:=0; elsif(stop=1) then t_state:=t0; elsif(sp=000) then t_state:=t2; else timecount=000001000000) then price=0100; else Price=0011)or(kmcnt3=0001) then Enable=1; else Enable=0; end if; end process;kmmone
10、y2:process(reset,clkout,clk,Enable,Price,kmcnt2)variable reg2:std_logic_vector(11 downto 0);variable clkout_cnt:integer range 0 to 10;begin if(reset=1) then cash1001) then reg2(7 downto 0):=reg2(7 downto 0)+00000111; if(reg2(7 downto 4)1001) then cash =reg2+000001100000; else cash=reg2; end if; else
11、 cash00001001) then reg2(7 downto 0):=reg2(7 downto 0)+00000110+price; if(reg2(7 downto 4)1001) then cash=reg2+000001100000; else cash=reg2; end if; else cash=reg2+price; end if; else clkout_cnt:=clkout_cnt+1; end if;end if;end if;end process;count1=cash(3 downto 0); -总费用的个位count2=cash(7 downto 4);
12、-总费用的十位count3=cash(11 downto 8); -总费用的百位end behavior;5.显示模块:时间的显示需要用到全部8个数码管,由于实验板上的所有数码管均对应同一组7段码,因此,需要采用动态扫描的方式实现时间显示。VHDL语言:library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_unsigned.all;entity display isport(clk:in std_logic; kmcount1:in std_logic_vector(3 downto 0); kmcount2:in std_lo
13、gic_vector(3 downto 0); kmcount3:in std_logic_vector(3 downto 0); count1:in std_logic_vector(3 downto 0); count2:in std_logic_vector(3 downto 0); count3:in std_logic_vector(3 downto 0); clkout:out std_logic_vector(6 downto 0); sel:buffer std_logic_vector(2 downto 0);end display;architecture dtsm of
14、display is signal key:std_logic_vector(3 downto 0); begin process(clk) variable dount:std_logic_vector(2 downto 0):=000; begin if rising_edge(clk) then if dount=111 then dount:=000; else dount:=dount+1; end if; end if; selkeykeykeykeykeykeykeykeynull; end case; end process; process(key) begin case key is when 0000=clkoutclkoutclkoutclkoutclkoutclkoutclkoutclkoutclkoutclkoutclkoutclkoutclkout=1111111; end case;end process;end dtsm;
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