The 1998 ACM Computing Classification System.docx

1、The 1998 ACM Computing Classification SystemCopyright 2007, by the Association for Computing Machinery, Inc.Permission to make digital or hard copies of part or all of this workfor personal or classroom use is granted without fee provided thatcopies are not made or distributed for profit or commerci

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3、81 or E-mail permissionsacm.org.A. General LiteratureA.0 GENERAL Biographies/autobiographies Conference proceedings General literary works (e.g., fiction, plays)A.1 INTRODUCTORY AND SURVEYA.2 REFERENCE (e.g., dictionaries, encyclopedias, glossaries)A.m MISCELLANEOUSB. HardwareB.0 GENERALB.1 CONTROL

4、STRUCTURES AND MICROPROGRAMMING (D.3.2)B.1.0 GeneralB.1.1 Control Design Styles Hardwired control* Microprogrammed logic arrays* Writable control store*B.1.2 Control Structure Performance Analysis and Design Aids Automatic synthesis* Formal models* Simulation*B.1.3 Control Structure Reliability, Tes

5、ting, and Fault-Tolerance* (B.8) Diagnostics* Error-checking* Redundant design* Test generation*B.1.4 Microprogram Design Aids (D.2.2, D.2.4, D.3.2, D.3.4) Firmware engineering* Languages and compilers Machine-independent microcode generation* Optimization Verification*B.1.5 Microcode Applications D

6、irect data manipulation* Firmware support of operating systems/instruction sets* Instruction set interpretation Peripheral control* Special-purpose*B.1.m MiscellaneousB.2 ARITHMETIC AND LOGIC STRUCTURESB.2.0 GeneralB.2.1 Design Styles (C.1.1-2) Calculator* Parallel PipelineB.2.2 Performance Analysis

7、 and Design Aids* (B.8) Simulation* Verification* Worst-case analysis*B.2.3 Reliability, Testing, and Fault-Tolerance* (B.8) Diagnostics* Error-checking* Redundant design* Test generation*B.2.4 High-Speed Arithmetic (NEW) Algorithms (NEW) Cost/performance (NEW)B.2.m MiscellaneousB.3 MEMORY STRUCTURE

8、SB.3.0 GeneralB.3.1 Semiconductor Memories (NEW) (B.7.1) Dynamic memory (DRAM) (NEW) Read-only memory (ROM) (NEW) Static memory (SRAM) (NEW)B.3.2 Design Styles (D.4.2) Associative memories Cache memories Interleaved memories* Mass storage (e.g., magnetic, optical, RAID) (REVISED) Primary memory Sequ

9、ential-access memory* Shared memory Virtual memoryB.3.3 Performance Analysis and Design Aids* (B.8, C.4) Formal models* Simulation* Worst-case analysis*B.3.4 Reliability, Testing, and Fault-Tolerance* (B.8) Diagnostics* Error-checking* Redundant design* Test generation*B.3.m MiscellaneousB.4 INPUT/O

10、UTPUT AND DATA COMMUNICATIONSB.4.0 GeneralB.4.1 Data Communications Devices Processors* Receivers (e.g., voice, data, image)* Transmitters*B.4.2 Input/Output Devices Channels and controllers Data terminals and printers Image display VoiceB.4.3 Interconnections (Subsystems) Asynchronous/synchronous o

11、peration Fiber optics Interfaces Parallel I/O (NEW) Physical structures (e.g., backplanes, cables, chip carriers)* Topology (e.g., bus, point-to-point)B.4.4 Performance Analysis and Design Aids* (B.8) Formal models* Simulation* Verification* Worst-case analysis*B.4.5 Reliability, Testing, and Fault-

12、Tolerance* (B.8) Built-in tests* Diagnostics* Error-checking* Hardware reliability* Redundant design* Test generation*B.4.m MiscellaneousB.5 REGISTER-TRANSFER-LEVEL IMPLEMENTATIONB.5.0 GeneralB.5.1 Design Arithmetic and logic units Control design Data-path design Memory design Styles (e.g., parallel

13、, pipeline, special-purpose)B.5.2 Design Aids Automatic synthesis Hardware description languages Optimization Simulation VerificationB.5.3 Reliability and Testing* (B.8) Built-in tests* Error-checking* Redundant design* Test generation* Testability*B.5.m MiscellaneousB.6 LOGIC DESIGNB.6.0 GeneralB.6

14、.1 Design Styles Cellular arrays and automata Combinational logic Logic arrays Memory control and access* Memory used as logic* Parallel circuits Sequential circuitsB.6.2 Reliability and Testing* (B.8) Built-in tests* Error-checking* Redundant design* Test generation* Testability*B.6.3 Design Aids A

15、utomatic synthesis Hardware description languages Optimization Simulation Switching theory VerificationB.6.m MiscellaneousB.7 INTEGRATED CIRCUITSB.7.0 GeneralB.7.1 Types and Design Styles Advanced technologies Algorithms implemented in hardware Gate arrays Input/output circuits Memory technologies M

16、icroprocessors and microcomputers Standard cells* VLSI (very large scale integration)B.7.2 Design Aids Graphics Layout Placement and routing Simulation VerificationB.7.3 Reliability and Testing* (B.8) Built-in tests* Error-checking* Redundant design* Test generation* Testability*B.7.m MiscellaneousB

17、.8 PERFORMANCE AND RELIABILITY (C.4) (NEW)B.8.0 General (NEW)B.8.1 Reliability, Testing, and Fault-Tolerance (NEW)B.8.2 Performance Analysis and Design Aids (NEW)B.8.m Miscellaneous (NEW)B.m MISCELLANEOUS Design managementC. Computer Systems OrganizationC.0 GENERAL Hardware/software interfaces Instr

18、uction set design (e.g., RISC, CISC, VLIW) (REVISED) Modeling of computer architecture (NEW) System architectures Systems specification methodologyC.1 PROCESSOR ARCHITECTURESC.1.0 GeneralC.1.1 Single Data Stream Architectures Multiple-instruction-stream, single-data-stream processors (MISD)* Pipelin

19、e processors* RISC/CISC, VLIW architectures (NEW) Single-instruction-stream, single-data-stream processors (SISD)* Von Neumann architectures*C.1.2 Multiple Data Stream Architectures (Multiprocessors) Array and vector processors Associative processors Connection machines Interconnection architectures

20、 (e.g., common bus, multiport memory, crossbar switch) Multiple-instruction-stream, multiple-data-stream processors (MIMD) Parallel processors* Pipeline processors* Single-instruction-stream, multiple-data-stream processors (SIMD)C.1.3 Other Architecture Styles Adaptable architectures Analog compute

21、rs (NEW) Capability architectures* Cellular architecture (e.g., mobile) (REVISED) Data-flow architectures Heterogeneous (hybrid) systems (NEW) High-level language architectures* Neural nets Pipeline processors (NEW) Stack-oriented processors*C.1.4 Parallel Architectures (NEW) Distributed architectur

22、es (NEW) Mobile processors (NEW)C.1.m Miscellaneous Analog computers* Hybrid systems*C.2 COMPUTER-COMMUNICATION NETWORKSC.2.0 General Data communications Open Systems Interconnection reference model (OSI) Security and protection (e.g., firewalls) (REVISED)C.2.1 Network Architecture and Design Asynch

23、ronous Transfer Mode (ATM) (NEW) Centralized networks* Circuit-switching networks Distributed networks Frame relay networks (NEW) ISDN (Integrated Services Digital Network) Network communications Network topology Packet-switching networks (REVISED) Store and forward networks Wireless communication (

24、NEW)C.2.2 Network Protocols Applications (SMTP, FTP, etc.) (NEW) Protocol architecture (OSI model) (REVISED) Protocol verification Routing protocols (NEW)C.2.3 Network Operations Network management Network monitoring Public networksC.2.4 Distributed Systems Client/server (NEW) Distributed applicatio

25、ns Distributed databases Network operating systemsC.2.5 Local and Wide-Area Networks (REVISED) Access schemes Buses Ethernet (e.g., CSMA/CD) (NEW) High-speed (e.g., FDDI, fiber channel, ATM) (NEW) Internet (e.g., TCP/IP) (NEW) Token rings (REVISED)C.2.6 Internetworking (C.2.2) (NEW) Routers (NEW) St

26、andards (e.g., TCP/IP) (NEW)C.2.m MiscellaneousC.3 SPECIAL-PURPOSE AND APPLICATION-BASED SYSTEMS (J.7) Microprocessor/microcomputer applications Process control systems Real-time and embedded systems (REVISED) Signal processing systems Smartcards (NEW)C.4 PERFORMANCE OF SYSTEMS Design studies Fault

27、tolerance (NEW) Measurement techniques Modeling techniques Performance attributes Reliability, availability, and serviceabilityC.5 COMPUTER SYSTEM IMPLEMENTATIONC.5.0 GeneralC.5.1 Large and Medium (Mainframe) Computers Super (very large) computersC.5.2 Minicomputers*C.5.3 Microcomputers Microprocess

28、ors Personal computers Portable devices (e.g., laptops, personal digital assistants) (NEW) WorkstationsC.5.4 VLSI SystemsC.5.5 Servers (NEW)C.5.m MiscellaneousC.m MISCELLANEOUSD. SoftwareD.0 GENERALD.1 PROGRAMMING TECHNIQUES (E)D.1.0 GeneralD.1.1 Applicative (Functional) ProgrammingD.1.2 Automatic P

29、rogramming (I.2.2)D.1.3 Concurrent Programming Distributed programming Parallel programmingD.1.4 Sequential ProgrammingD.1.5 Object-oriented ProgrammingD.1.6 Logic ProgrammingD.1.7 Visual ProgrammingD.1.m MiscellaneousD.2 SOFTWARE ENGINEERING (K.6.3)D.2.0 General (K.5.1) Protection mechanisms Standa

30、rdsD.2.1 Requirements/Specifications (D.3.1) Elicitation methods (e.g., rapid prototyping, interviews, JAD) (NEW) Languages Methodologies (e.g., object-oriented, structured) (REVISED) ToolsD.2.2 Design Tools and Techniques (REVISED) Computer-aided software engineering (CASE) Decision tables Evolutionary prototyping (NEW) Flow charts Modules and interfaces Object-oriented design methods (NEW) Petri nets Programmer workbench* Software libraries State diagrams (NEW) Structured programming* Top-down programming*