FPGA实验指导书.docx

1、FPGA实验指导书山东工商学院实验指导书信息与电子工程学院在此处键入文档摘要。摘要通常为文档内容的简短概括。在此处键入文档摘要。摘要通常为文档内容的简短概括。第一部分实验开发系统概述及使用说明1.1 DE2-115开发板简介图1-1 DE2-115开发板DE2-115 开发板包括以下硬件资源： Altera Cyclone IV 4CE115 FPGA 器件 Altera 系列配置 EPCS64 板上 USB Blaster 用于编程，同时支持 JTAG 模式和 AS 模式 2MB SRAM 2片 64MB SDRAM 8MB 闪存 SD 卡插槽 4个按钮开关 18个滑动开关 18个红色 LE

2、Ds 9个绿色 LEDs 50MHz 晶振提供给时钟源 24-bit CD-品质声道 CODEC 带有线路输入, 线路输出和麦克风输入接口 VGA DAC (8-比特高速三通道 DACs) 带有 VGA 输出接口 TV 解码器 (NTSC/PAL/SECAM) 和 TV 输入接口 2千兆以太网 PHY 带 RJ45 连接器 带有 A 类和 B 类 USB 接口的 USB 主从控制器 RS-232 收发器和 9 针连接器 PS/2 鼠标/键盘接口 IR 收发器 2个 SMA 接头，用于外部时钟输入/输出 1个 40-pin 扩展口，带二极管保护 1个 HSMC 连接器 16x2 LCD 模组除了

3、这些硬件功能外，DE2-115 开发板还支持标准 I/O 接口和用于评估各项组件的控制面板等软件工具。该软件也提供用于验证 DE2-115 开发板高级功能的大量实例演示。1.2 DE2-115系统框图图1-2给出了DE2-115的系统框图。所有的连接都是通过Cyclone IV E FPGA器件来实现的。用户可以通过配置FPGA来实现各种系统设计。图1-2 DE2115系统框图下面是图1-2中各功能块的详细信息：FPGA 器件 Cyclone IV EP4CE115F29 器件 114,480 个逻辑单元 432 M9K 内存模块 3,888 Kbits 嵌入式存储器位 4 个锁相环FPGA

4、配置 同时支持 JTAG 模式和 AS 模式 提供系列配置器件EPCS64 内建 USB Blaster 电路存储器配置 128MB (32Mx32bit) SDRAM 2MB (1Mx16) SRAM 8位 8MB (4Mx16) Flash 存储器 8M48 位闪存 32Kb EEPROMSD 卡接口 提供 SPI 模式和 4 位 SD 模式用于 SD 卡接入连接器 2个 10/100/1000 以太网接口 1个 HSMC 可配置的 I/O 标准 (电平：3.3/2.5/1.8/1.5V) A 型和 B 型 USB 接口 完全兼容 USB 2.0 的主从控制器 支持全速和低速数据传输 可用

5、于 PC 驱动 40 针扩展口 可配置的 I/O 标准 (电平：3.3/2.5/1.8/1.5V) VGA 输出接口 VGA DAC (三通道高速视频 DACs) 提供带有流控制的 RS-232 端口的 DB9 连接器 提供 PS/2 鼠标/键盘连接器时钟输入 3个 50MHz 晶振 1个 SMA 外部时钟输入音频 CODEC 24 位编码器/解码器 CODEC 包括线路输入, 线路输出和麦克风输入显示输出 16x2 LCD 模组开关和显像管 18个滑动开关和 4 个按钮开关 18个红色和 9 个绿色 LEDs 8个七段显像管其他特征 红外遥控接收模块 TV 解码器 (NTSC/PAL/SEC

6、AM 制式) 和 TV-in 连接器电源 直流电源输入 开关和降压调节器 LM3150MH1.3 DE2-115引脚列表表1 拨码开关引脚配置信号名FPGA 引脚号描述I/O 标准SW0PIN_AB28Slide Switch0Depending on JP7SW1PIN_AC28Slide Switch1Depending on JP7SW2PIN_AC27Slide Switch2Depending on JP7SW3PIN_AD27Slide Switch3Depending on JP7SW4PIN_AB27Slide Switch4Depending on JP7SW5PIN_AC2

7、6Slide Switch5Depending on JP7SW6PIN_AD26Slide Switch6Depending on JP7SW7PIN_AB26Slide Switch7Depending on JP7SW8PIN_AC25Slide Switch8Depending on JP7SW9PIN_AB25Slide Switch9Depending on JP7SW10PIN_AC24Slide Switch10Depending on JP7SW11PIN_AB24Slide Switch11Depending on JP7SW12PIN_AB23Slide Switch12

8、Depending on JP7SW13PIN_AA24Slide Switch13Depending on JP7SW14PIN_AA23Slide Switch14Depending on JP7SW15PIN_AA22Slide Switch15Depending on JP7SW16PIN_Y24Slide Switch16Depending on JP7SW17PIN_Y23Slide Switch17Depending on JP7表 2 按钮开关引脚配置 信号名FPGA 引脚号描述I/O 标准KEY0PIN_M23Push-button0Depending on JP7KEY1P

9、IN_M21Push-button1Depending on JP7KEY2PIN_N21Push-button2Depending on JP7KEY3PIN_R24Push-button3Depending on JP7表 3 LED 引脚配置信号名FPGA 引脚号描述I/O 标准LEDR0PIN_G19LED Red02.5VLEDR1PIN_F19LED Red12.5VLEDR2PIN_E19LED Red22.5VLEDR3PIN_F21LED Red32.5VLEDR4PIN_F18LED Red42.5VLEDR5PIN_E18LED Red52.5VLEDR6PIN_J19L

10、ED Red62.5VLEDR7PIN_H19LED Red72.5VLEDR8PIN_J17LED Red82.5VLEDR9PIN_G17LED Red92.5VLEDR10PIN_J15LED Red102.5VLEDR11PIN_H16LED Red112.5VLEDR12PIN_J16LED Red122.5VLEDR13PIN_H17LED Red132.5VLEDR14PIN_F15LED Red142.5VLEDR15PIN_G15LED Red152.5VLEDR16PIN_G16LED Red162.5VLEDR17PIN_H15LED Red172.5VLEDG0PIN_

11、E21LED Green02.5VLEDG1PIN_E22LED Green12.5VLEDG2PIN_E25LED Green22.5VLEDG3PIN_E24LED Green32.5VLEDG4PIN_H21LED Green42.5VLEDG5PIN_G20LED Green52.5VLEDG6PIN_G22LED Green62.5VLEDG7PIN_G21LED Green72.5VLEDG8PIN_F17LED Green82.5V表 4 七段数码管引脚配置信号名FPGA 引脚号描述I/O 标准HEX00PIN_G18Seven Segment Digit 002.5VHEX01

12、PIN_F22Seven Segment Digit 012.5VHEX02PIN_E17Seven Segment Digit 022.5VHEX03PIN_L26Seven Segment Digit 03Depending on JP7HEX04PIN_L25Seven Segment Digit 04Depending on JP7HEX05PIN_J22Seven Segment Digit 05Depending on JP7HEX06PIN_H22Seven Segment Digit 06Depending on JP7HEX10PIN_M24Seven Segment Dig

13、it 10Depending on JP7HEX11PIN_Y22Seven Segment Digit 11Depending on JP7HEX12PIN_W21Seven Segment Digit 12Depending on JP7HEX13PIN_W22Seven Segment Digit 13Depending on JP7HEX14PIN_W25Seven Segment Digit 14Depending on JP7HEX15PIN_U23Seven Segment Digit 15Depending on JP7HEX16PIN_U24Seven Segment Dig

14、it 16Depending on JP7HEX20PIN_AA25Seven Segment Digit 20Depending on JP7HEX21PIN_AA26Seven Segment Digit 21Depending on JP7HEX22PIN_Y25Seven Segment Digit 22Depending on JP7HEX23PIN_W26Seven Segment Digit 23Depending on JP7HEX24PIN_Y26Seven Segment Digit 24Depending on JP7HEX25PIN_W27Seven Segment D

15、igit 25Depending on JP7HEX26PIN_W28Seven Segment Digit 26Depending on JP7HEX30PIN_V21Seven Segment Digit 30Depending on JP7HEX31PIN_U21Seven Segment Digit 31Depending on JP7HEX32PIN_AB20Seven Segment Digit 32Depending on JP6HEX33PIN_AA21Seven Segment Digit 33Depending on JP6HEX34PIN_AD24Seven Segmen

16、t Digit 34Depending on JP6HEX35PIN_AF23Seven Segment Digit 35Depending on JP6HEX36PIN_Y19Seven Segment Digit 36Depending on JP6HEX40PIN_AB19Seven Segment Digit 40Depending on JP6HEX41PIN_AA19Seven Segment Digit 41Depending on JP6HEX42PIN_AG21Seven Segment Digit 42Depending on JP6HEX43PIN_AH21Seven S

17、egment Digit 43Depending on JP6HEX44PIN_AE19Seven Segment Digit 44Depending on JP6HEX45PIN_AF19Seven Segment Digit 45Depending on JP6HEX46PIN_AE18Seven Segment Digit 46Depending on JP6HEX50PIN_AD18Seven Segment Digit 50Depending on JP6HEX51PIN_AC18Seven Segment Digit 51Depending on JP6HEX52PIN_AB18S

18、even Segment Digit 52Depending on JP6HEX53PIN_AH19Seven Segment Digit 53Depending on JP6HEX54PIN_AG19Seven Segment Digit 54Depending on JP6HEX55PIN_AF18Seven Segment Digit 55Depending on JP6HEX56PIN_AH18Seven Segment Digit 56Depending on JP6HEX60PIN_AA17Seven Segment Digit 60Depending on JP6HEX61PIN

19、_AB16Seven Segment Digit 61Depending on JP6HEX62PIN_AA16Seven Segment Digit 62Depending on JP6HEX63PIN_AB17Seven Segment Digit 63Depending on JP6HEX64PIN_AB15Seven Segment Digit 64Depending on JP6HEX65PIN_AA15Seven Segment Digit 65Depending on JP6HEX66PIN_AC17Seven Segment Digit 66Depending on JP6HE

20、X70PIN_AD17Seven Segment Digit 70Depending on JP6HEX71PIN_AE17Seven Segment Digit 71Depending on JP6HEX72PIN_AG17Seven Segment Digit 72Depending on JP6HEX73PIN_AH17Seven Segment Digit 73Depending on JP6HEX74PIN_AF17Seven Segment Digit 74Depending on JP6HEX75PIN_AG18Seven Segment Digit 75Depending on

21、 JP6HEX76PIN_AA14Seven Segment Digit 763.3V表 5 时钟信号引脚配置信息信号名FPGA 引脚号描述I/O 标准CLOCK_50PIN_Y250 MHz clock input3.3VCLOCK2_50PIN_AG1450 MHz clock input3.3VCLOCK3_50PIN_AG1550 MHz clock inputDepending on JP6SMA_CLKOUTPIN_AE23External (SMA) clock outputDepending on JP6SMA_CLKINPIN_AH14External (SMA) clock

22、 input3.3V表 6 LCD 模块引脚配置信号名FPGA 引脚号描述I/O 标准LCD_DATA7PIN_M5LCD Data73.3VLCD_DATA6PIN_M3LCD Data63.3VLCD_DATA5PIN_K2LCD Data53.3VLCD_DATA4PIN_K1LCD Data43.3VLCD_DATA3PIN_K7LCD Data33.3VLCD_DATA2PIN_L2LCD Data23.3VLCD_DATA1PIN_L1LCD Data13.3VLCD_DATA0PIN_L3LCD Data03.3VLCD_ENPIN_L4LCD Enable3.3VLCD_RWP

23、IN_M1LCD Read/Write Select, 0 = Write, 1 = Read3.3VLCD_RSPIN_M2LCD Command/Data Select, 0 = Command, 1 = Data3.3VLCD_ONPIN_L5LCD Power ON/OFF3.3VLCD_BLONPIN_L6LCD Back Light ON/OFF3.3V表 7 HSMC 接口引脚配置信号名eFPGA 引脚号描述I/O 标准HSMC_CLKIN0PIN_AH15Dedicated clock inputDepending on JP6HSMC_CLKIN_N1PIN_J28LVDS

24、RX or CMOS I/O or differential clock inputDepending on JP7HSMC_CLKIN_N2PIN_Y28LVDS RX or CMOS I/O or differential clock inputDepending on JP7HSMC_CLKIN_P1PIN_J27LVDS RX or CMOS I/O or differential clock inputDepending on JP7HSMC_CLKIN_P2PIN_Y27LVDS RX or CMOS I/O or differential clock inputDepending

25、 on JP7HSMC_CLKOUT0PIN_AD28Dedicated clock outputDepending on JP7HSMC_CLKOUT_N1PIN_G24LVDS TX or CMOS I/O or differential clock input/outputDepending on JP7HSMC_CLKOUT_N2PIN_V24LVDS TX or CMOS I/O or differential clock input/outputDepending on JP7HSMC_CLKOUT_P1PIN_G23LVDS TX or CMOS I/O or different

26、ial clock input/outputDepending on JP7HSMC_CLKOUT_P2PIN_V23LVDS TX or CMOS I/O or differential clock input/outputDepending on JP7HSMC_D0PIN_AE26LVDS TX or CMOS I/ODepending on JP7HSMC_D1PIN_AE28LVDS TX or CMOS I/ODepending on JP7HSMC_D2PIN_AE27LVDS TX or CMOS I/ODepending on JP7HSMC_D3PIN_AF27LVDS TX or CMOS I/ODepending on JP7HSMC_RX_D_N0PIN_F25LVDS RX bit 0n or CMOS I/ODepending on JP7HSMC_RX_D_N1PIN_C27LVDS RX bit 1n or CMOS I/ODepending on JP7HSMC_RX_D_N2PIN_E26LVDS RX bit 2n or CMOS I/ODepending on JP7HSMC_RX_D