VHDL语言设计数字系统的外文翻译教学内容.docx

1、VHDL语言设计数字系统的外文翻译教学内容Designing a Digital system with VHDL Valentina Stoyanova KukenskaAbstract: In this paper a digital system designing with VHDL is presented. Here are exposed sequentially all the phases of the very digital systems designing. The main methods are also on show here. The project des

2、criptions types are presented. The stress is put on the use of VHDL for synthesis of structural and behavioral models.For creating the project of the chosen digital system an integrated system WebPack was used, as well as ModelSIm XE II for the models simulation. Keywords: Design, VHDL, digital syst

3、ems, model, WebPack 1. INTRODUCTIONThe digital systems are complex ones, consisting of lots of components. As far as the automated design of such systems is concerned, methods for designing time reducing and limiting the complexity of the task are sought out and applied. A method of the kind is conn

4、ected with the decomposition and hierarchy principles. The decomposition of the systems is realized in a way, which differentiates functionally independent modules. A digital system can be described as a module with inputs and/or outputs. The electrical values on the outputs are some function of the

5、 values on the inputs. One way of describing the function of a module is to describe how it is composed of sub-modules. Each of the sub-modules is an instance of some entity, and the ports of the instances are connected using signals. This kind of description is called a structural description.In ma

6、ny cases, it is not appropriate to describe a module structurally. One such case is a module, which is at the bottom of the hierarchy of some other structural description. For example, if you are designing a system using IC packages bought from an IC shop, you do not need to describe the internal st

7、ructure of an IC. In such cases, a description of the function performed by the module is required, without reference to its actual internal structure. Such a description is called a functional or behavioral description.Usually, for structural and behavioral description, either Verilog or VHDL is us

8、ed. In this paper a designing with VHDL is presented. Here are exposed sequentially all the phases of the very digital systems designing. The main methods are also on show here. The project descriptions types are presented. The stress is put on the use of VHDL for synthesis of structural and behavio

9、ral models. Here are presented several VHDL models of computer systems components. 2. Methods and stages in digital systems designIn digital systems design, as well as design of complex systems, a couple of methods are in use: top - down designing; up - down designing.In top - down designing the bui

10、lding up of the system is usually started from below in upright direction through elaborating the element blocks schemes, assembled later to form the whole product.An advantage of this method is the use of representation on functional block level and the lower, the structural level, is addressed onl

11、y during the error check simulations within the project.The up-down designing starts with a specification on the highest level. After that, the project is being decomposed into functional blocks and the requirements for the income and outcome time proportions are specified. The functional models are

12、 described through behavioral models or by models on register levels and are subsequently simulated.Some of the advantages of the methods are: n easier execution of the tasks specifications; t allows a projects check on system level, without tackling the structural details; The projects check is don

13、e, with no regard to the technology of its realization. That allows that the choice of technology be made on a later stage of the designing project.The most effective up-down designing method is the use of an abstract description of the scheme and the sequential details specifying of the different h

14、ierarchy levels description. The digital systems design goes through the next stages: Specification; Functional (electrical) designing; Physical designing; Manufacturing; Testing.Through specification the product parameters, necessary for its proper destination, are determined.Through the functional

15、 (electrical) designing, the electrical scheme, responsible for the functions and parameters of the product, in terms of the specification, is elaborated.The behavioral stage serves as a description for the scheme as a system, and its entries and exits are marked out. In most of the cases, VHDL mode

16、ls are used.The Functional (electrical) designing deals with main functional blocks elaboration. Usually a detailed VHDL description of the functional block is made and being checked by a VHDL simulation.With the increasing complexity of the projects, for the elaboration on structural level, the tec

17、hnique of synthesis is applied. It allows that the scheme with logical elements be synthesized from a VHDL description. Through logical description details such as charging, elements delay, are specified and crucial methods and problems with time scattering of signals are defined.The Physical design

18、ing stages strongly depend on technology. The common task is concerned with the deploying of the logical elements and defining (tracing) their interrelations. Provided that for the product realization PLD, CPLD or FPGA chips are used, then the result of the physical designing represents a configurat

19、ion file for designing the chosen devices resources. The testing of the project represents a number of procedures, used by designers, to provide: adequacy between project and specification; the execution of the project in terms of the chosen technology. The designing process is usually iterative, in

20、cluding pre-designing of given parts, until the intended indicators are obtained.For the tasks of testing in electrical designing (the functionality of the product and its electrical parameters), simulations are used.The simulation on behavioral level defines how the product will run, before its act

21、ual compounding blocks are chosen. For working out of the behavioral models, the hardware description languages are used (VHDL, Verilog and others).Through simulation, on a logical primitives level, the schemes are built up with basic logical elements “AND-NO”, “OR-NO”, invertors and triggers and ar

22、e being simulated in order to find out irrelevances with their expected acting.In functional testing, the delays are not concerned or they are supposed similar for all logical elements.Error identification after the physical designAfter topologys final elaboration are made the next procedures: check

23、 out of the tech norms throughout manufacturing; check out for the projects authenticity.The tech norms for manufacturing are specific for each technological process. The authenticity verification of the project aims to guarantee the products proper working. It includes: finding out the interconnect

24、ion of the scheme; finding out the parasite components of the topology.3. Types of design descriptionsThrough the designing process, three types of design description are in use: behavioral; structural; physical.The behavioral description tackles the system as if it were a kind of “black box” with i

25、ts entrances and exits, with no regard to its structure. The aim is to ignore the redundant details and to concentrate on the specification of the necessary for the functions, which are to be done by the product. On this stage, languages for the apparatus part are used HDL (Hardware Description Lang

26、uages) - VHDL, Verilog and others. The structural description defines the way that the system is to be built up. Here, the systems structure, made of blocks and their interrelations, is tackled. The subsystems, which are to provide its functional execution, as well as their detailed description for

27、analysis of the operational speed, charging and so on, are defined. The structural description can be presented by languages for the description of the hardware, as well as by electrical schemes.The design process is connected with the transformations of the systems descriptions and their sequential

28、 details specification. Decomposition from behavioral to structural description can be realized on a number of levels in a hierarchy. From the highest to the lowest, these levels can be outlined as it follows: system level; functional level; logical level; scheme level.On the highest system level, t

29、he systems behavior is represented by algorithms that describe its functions. In order that these functions be executed, the architecture of the system is worked out, including microprocessors, memories, main boards and other structural components. On the lower level, the systems behavior is describ

30、ed by Bolivia equations. For their execution, logical elements and triggers are used.4. Use of VHDL for synthesis of structural and behavioral modelsVHDL is a Hardware Description Language for describing digital system 2.VHDL is designed to full a number of needs in the design process. VHDL contains

31、 a number of facilities for modifying the state of objects and controlling the flow of execution of modules.In VHDL, an entity is such a module which may be used as a component in a design, or which may be the top-level module of the design. The entity declarative part may be used to declare items,

32、which are to be used in the implementation of the entity. Once an entity has had its interface specified in an entity declaration, one or more implementations of the entity can be described in architecture bodies. Each architecture body can describe a different view of the entity.The declarations in the archit