1、Floating Gate Charge(Q),p+Substrate,GND,VG=+9.3V,VD=+4.5V,Control Gate,Floating Gate,Source,Drain,Logic state“0”,Flash Cell Operation-Erase ModeNegative Gate-FN Tunneling,p+Substrate,Control Gate,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,e-,Electrically-erasable charge from gate,Source,Drain,Logic s
2、tate“1”,Flash Memory Bit Threshold Voltages,Flash Array Architecture(schematic),Core memory(core),Flash Array Cell Addressing,Row Decoder,Column Decoder,Source Switch,Basic Memory Device Internal Architecture,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,A0,A1,A2,A3,A4,A5,A6,A7,Memory cell,Memory Cell block:每个CEL
3、L存储 data(1/0)Address Decoder Circuitry:地址译码 以(A0)来选择不同的memory cell or block进行读写操作。Input/Output I/O)circuitry:是memory Cell 和外界的输入输出接口,将data 在(D0)与Cell间传输。Control Circuitry:控制memory Cell 工作状态的电路 CE/OE/WE(Chip Enable/Output Enable/Write Enable),Unit 2:Device Testing DC parametric testAC parametric test
4、Functional Test,DC parametric test,ISVM:Force current message voltageVSIM:Force voltage message current,DC Parametric Tests:测试 Address Decoder 和 I/O 回路 中Input/Output Buffer的DC特性。在DC Test中一般使用 VSIM 及ISVM 的方法。,DC Contact Check 开路/短路测试 OPEN/SHORTInput/Output Leakage Check 输入/输出漏电流测试 INLEAK/OUTLEAK CMOS
5、 Automatic Sleep CMOS自动睡眠模式电流测试 CMOSASM Standby Current Check Device不工作时待机电流测试 ICCSBOutput Drive Voltage&Current Device 电压及电流驱动能力测试 VOH/VOL,DC Parametric Test OPEN/SHOR TestINLEAK/OUTLEAK TestCMOSASMICCSB TestVOH/VOL Test,Open Test,Purpose:测量 device pins 是否 correctly to DUT/Tester channel 测量 Device内
6、部 管脚是否有开路。,Ground all pins(including VCC);Set Voltage Clamp 3.0 volts;Using PMU,force positive or negative current,one pin at a time;Measure resultant voltage;Fails test(open)if the absolute voltage measured is greater than 1.5V;,Test Method,Short Test,Purpose:测试 the device pins 是否有短路 Test Method:Us
7、ing PMU,force positive or negative Voltage,one pin at a time;Measure resultant current;Fails test(short)if the absolute voltage measured is less than 0.2V.,Definition,IIL-Input leakage lowThe current in an input when it is forced low voltage.,IIH-Input leakage highThe current in an input when it is
8、forced high voltage.,Why test?The IIL test measures the resistance from an input pin to VCC,IIH test measures the resistance from an input pin to VSS.The test insures that the input buffers offer a high resistance when apply 0v and VCC.,Input Leakage Test(INLEAK),Input Leakage Low Test-IIL,Test Method,Apply VCCmax.Preconditioning all inputs to logic
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