动态扫描.docx
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动态扫描
实验8:
动态扫描实验:
用4个按键分别代表加、减、暂停、复位,四位数码管代表四位十进制数,从0000开始到9999循环,自动计数,数据显示时间不大于1秒。
moduledongtaisaomiao(sys_sclk,kadd,kcut,kstop,krest,sels,seg);
inputsys_sclk,kadd,kcut,kstop,krest;
outputreg[2:
0]sels;
outputreg[6:
0]seg;
reg[1:
0]sels0;
reg[15:
0]data;
regclk1hz;
regclk;
reg[3:
0]disdata;
reg[30:
0]count;reg[30:
0]count1;
regkey1,key2,key3,key4;
always@(posedgesys_sclk)
begin
if(count==25000000)begincount<=0;clk1hz<=~clk1hz;end
elsecount<=count+1;
end
always@(posedgesys_sclk)
begin
if(count1==100000)begincount1<=0;clk<=~clk;end
elsecount1<=count1+1;
end
always@(posedgeclk)
begin
sels0<=sels0+1;
sels<=sels0;
end
always@(kadd,kcut,kstop,krest)
begin
if(!
krest)
beginkey1<=1;key2<=0;key3<=0;key4<=0;end
if(!
kadd)
beginkey1<=0;key2<=1;key3<=0;key4<=0;end
if(!
kcut)
beginkey1<=0;key2<=0;key3<=1;key4<=0;end
if(!
kstop)
beginkey1<=0;key2<=0;key3<=0;key4<=1;end
end
always@(posedgeclk1hz)
begin
if(key1==1)
data[15:
0]<=0;
if(key2==1)
begin
if(data[3:
0]==9)
begin
data[3:
0]<=0;
if(data[7:
4]==9)
begin
data[7:
4]<=0;
if(data[11:
8]==9)
begin
data[11:
8]<=0;
if(data[15:
12]==9)
begin
data[15:
12]<=0;
end
elsedata[15:
12]<=data[15:
12]+1;
end
elsedata[11:
8]<=data[11:
8]+1;
end
elsedata[7:
4]<=data[7:
4]+1;
end
elsedata[3:
0]<=data[3:
0]+1;
end
if(key3==1)
begin
if(data[3:
0]==0)
begin
data[3:
0]<=9;
if(data[7:
4]==0)
begin
data[7:
4]<=9;
if(data[11:
8]==0)
begin
data[11:
8]<=9;
if(data[15:
12]==0)
begin
data[15:
12]<=9;
end
elsedata[15:
12]<=data[15:
12]-1;
end
elsedata[11:
8]<=data[11:
8]-1;
end
elsedata[7:
4]<=data[7:
4]-1;
end
elsedata[3:
0]<=data[3:
0]-1;
end
if(key4==1)data[15:
0]<=data[15:
0];
end
always@(selsordata)
begin
case(sels)
2'b00:
disdata<=data[15:
12];
2'b01:
disdata<=data[11:
8];
2'b10:
disdata<=data[7:
4];
2'b11:
disdata<=data[3:
0];
endcase
end
always@(disdata)
begin
case(disdata)
4'b0000:
seg=7'b1111110;
4'b0001:
seg=7'b0110000;
4'b0010:
seg=7'b1101101;
4'b0011:
seg=7'b1111001;
4'b0100:
seg=7'b0110011;
4'b0101:
seg=7'b1011011;
4'b0110:
seg=7'b1011111;
4'b0111:
seg=7'b1110000;
4'b1000:
seg=7'b1111111;
4'b1001:
seg=7'b1111011;
default:
seg=7'b1111110;
endcase
end
endmodule
显示学号:
moduledongtaisaomiao(sys_sclk,kadd,kcut,kstop,krest,sels,seg);
inputsys_sclk,kadd,kcut,kstop,krest;
outputreg[2:
0]sels;
outputreg[6:
0]seg;
reg[2:
0]sels0;
reg[31:
0]data;
regclk1hz;
regclk;
reg[3:
0]disdata;
reg[30:
0]count;reg[30:
0]count1;
regkey1,key2,key3,key4;
always@(posedgesys_sclk)
begin
if(count==25000000)begincount<=0;clk1hz<=~clk1hz;end
elsecount<=count+1;
end
always@(posedgesys_sclk)
begin
if(count1==100000)begincount1<=0;clk<=~clk;end
elsecount1<=count1+1;
end
always@(posedgeclk)
begin
sels0<=sels0+1;
sels<=sels0;
end
always@(kadd,kcut,kstop,krest)
begin
if(!
krest)
beginkey1<=1;key2<=0;key3<=0;key4<=0;end
if(!
kadd)
beginkey1<=0;key2<=1;key3<=0;key4<=0;end
if(!
kcut)
beginkey1<=0;key2<=0;key3<=1;key4<=0;end
if(!
kstop)
beginkey1<=0;key2<=0;key3<=0;key4<=1;end
end
always@(posedgeclk1hz)
begin
if(key1==1)
data[31:
0]<=32'h12700093;
if(key2==1)
begin
if(data[3:
0]==9)
begin
data[3:
0]<=0;
if(data[7:
4]==9)
begin
data[7:
4]<=0;
if(data[11:
8]==9)
begin
data[11:
8]<=0;
if(data[15:
12]==9)
begin
data[15:
12]<=0;
end
elsedata[15:
12]<=data[15:
12]+1;
end
elsedata[11:
8]<=data[11:
8]+1;
end
elsedata[7:
4]<=data[7:
4]+1;
end
elsedata[3:
0]<=data[3:
0]+1;
end
if(key3==1)
begin
if(data[3:
0]==0)
begin
data[3:
0]<=9;
if(data[7:
4]==0)
begin
data[7:
4]<=9;
if(data[11:
8]==0)
begin
data[11:
8]<=9;
if(data[15:
12]==0)
begin
data[15:
12]<=9;
end
elsedata[15:
12]<=data[15:
12]-1;
end
elsedata[11:
8]<=data[11:
8]-1;
end
elsedata[7:
4]<=data[7:
4]-1;
end
elsedata[3:
0]<=data[3:
0]-1;
end
if(key4==1)data[15:
0]<=data[15:
0];
end
always@(selsordata)
begin
case(sels)
3'b000:
disdata<=data[31:
28];
3'b001:
disdata<=data[27:
24];
3'b010:
disdata<=data[23:
20];
3'b011:
disdata<=data[19:
16];
3'b100:
disdata<=data[15:
12];
3'b101:
disdata<=data[11:
8];
3'b110:
disdata<=data[7:
4];
3'b111:
disdata<=data[3:
0];
endcase
end
always@(disdata)
begin
case(disdata)
4'b0000:
seg=7'b1111110;
4'b0001:
seg=7'b0110000;
4'b0010:
seg=7'b1101101;
4'b0011:
seg=7'b1111001;
4'b0100:
seg=7'b0110011;
4'b0101:
seg=7'b1011011;
4'b0110:
seg=7'b1011111;
4'b0111:
seg=7'b1110000;
4'b1000:
seg=7'b1111111;
4'b1001:
seg=7'b1111011;
default:
seg=7'b1111110;
endcase
end
endmodule
显示前4个数码管灭,后4个数码管亮:
moduleDong_Tai_Sao_Miao(sys_sclk,kadd,kcut,kstop,krest,sels,seg);
inputsys_sclk,kadd,kcut,kstop,krest;
outputreg[2:
0]sels;
outputreg[6:
0]seg;
reg[2:
0]sels0;
reg[31:
0]data;
regclk1hz;
regclk;
reg[3:
0]disdata;
reg[30:
0]count;reg[30:
0]count1;
regkey1,key2,key3,key4;
always@(posedgesys_sclk)
begin
if(count==25000000)begincount<=0;clk1hz<=~clk1hz;end
elsecount<=count+1;
end
always@(posedgesys_sclk)
begin
if(count1==100000)begincount1<=0;clk<=~clk;end
elsecount1<=count1+1;
end
always@(posedgeclk)
begin
sels0<=sels0+1;
sels<=sels0;
end
always@(kadd,kcut,kstop,krest)
begin
if(!
krest)
beginkey1<=1;key2<=0;key3<=0;key4<=0;end
if(!
kadd)
beginkey1<=0;key2<=1;key3<=0;key4<=0;end
if(!
kcut)
beginkey1<=0;key2<=0;key3<=1;key4<=0;end
if(!
kstop)
beginkey1<=0;key2<=0;key3<=0;key4<=1;end
end
always@(posedgeclk1hz)
begin
if(key1==1)
data[31:
0]<=32'h12700093;
if(key2==1)
begin
if(data[3:
0]==9)
begin
data[3:
0]<=0;
if(data[7:
4]==9)
begin
data[7:
4]<=0;
if(data[11:
8]==9)
begin
data[11:
8]<=0;
if(data[15:
12]==9)
begin
data[15:
12]<=0;
end
elsedata[15:
12]<=data[15:
12]+1;
end
elsedata[11:
8]<=data[11:
8]+1;
end
elsedata[7:
4]<=data[7:
4]+1;
end
elsedata[3:
0]<=data[3:
0]+1;
end
if(key3==1)
begin
if(data[3:
0]==0)
begin
data[3:
0]<=9;
if(data[7:
4]==0)
begin
data[7:
4]<=9;
if(data[11:
8]==0)
begin
data[11:
8]<=9;
if(data[15:
12]==0)
begin
data[15:
12]<=9;
end
elsedata[15:
12]<=data[15:
12]-1;
end
elsedata[11:
8]<=data[11:
8]-1;
end
elsedata[7:
4]<=data[7:
4]-1;
end
elsedata[3:
0]<=data[3:
0]-1;
end
if(key4==1)data[15:
0]<=data[15:
0];
end
always@(selsordata)
begin
case(sels)
3'b000:
begindisdata<=data[31:
28];disdata<=4'b1111;end
3'b001:
begindisdata<=data[27:
24];disdata<=4'b1111;end
3'b010:
begindisdata<=data[23:
20];disdata<=4'b1111;end
3'b011:
begindisdata<=data[19:
16];disdata<=4'b1111;end
3'b100:
disdata<=data[15:
12];
3'b101:
disdata<=data[11:
8];
3'b110:
disdata<=data[7:
4];
3'b111:
disdata<=data[3:
0];
endcase
end
always@(disdata)
begin
case(disdata)
4'b0000:
seg=7'b1111110;
4'b0001:
seg=7'b0110000;
4'b0010:
seg=7'b1101101;
4'b0011:
seg=7'b1111001;
4'b0100:
seg=7'b0110011;
4'b0101:
seg=7'b1011011;
4'b0110:
seg=7'b1011111;
4'b0111:
seg=7'b1110000;
4'b1000:
seg=7'b1111111;
4'b1001:
seg=7'b1111011;
default:
seg=7'b0000000;
endcase
end
endmodule
显示数码管亮的个数:
moduleDong_Tai_Sao_Miao(sys_sclk,kadd,kcut,kstop,krest,sels,seg);
inputsys_sclk,kadd,kcut,kstop,krest;
outputreg[2:
0]sels;
outputreg[6:
0]seg;
reg[2:
0]sels0;
reg[31:
0]data;
regclk1hz;
regclk;
reg[3:
0]disdata;
reg[30:
0]count;reg[30:
0]count1;
regkey1,key2,key3,key4;
always@(posedgesys_sclk)
begin
if(count==25000000)begincount<=0;clk1hz<=~clk1hz;end
elsecount<=count+1;
end
always@(posedgesys_sclk)
begin
if(count1==100000)begincount1<=0;clk<=~clk;end
elsecount1<=count1+1;
end
always@(posedgeclk)
begin
if(sels0==3'd5)sels0<=0;//6个数码管亮(if(sels0==3'd5)5个数码管亮(if(sels0==3'd4)
elsesels0<=sels0+1;
sels<=sels0;
end
always@(kadd,kcut,kstop,krest)
begin
if(!
krest)
beginkey1<=1;key2<=0;key3<=0;key4<=0;end
if(!
kadd)
beginkey1<=0;key2<=1;key3<=0;key4<=0;end
if(!
kcut)
beginkey1<=0;key2<=0;key3<=1;key4<=0;end
if(!
kstop)
beginkey1<=0;key2<=0;key3<=0;key4<=1;end
end
always@(posedgeclk1hz)
begin
if(key1==1)
data[31:
0]<=32'h12700093;
if(key2==1)
begin
if(data[3:
0]==9)
begin
data[3:
0]<=0;
if(data[7:
4]==9)
begin
data[7:
4]<=0;
if(data[11:
8]==9)
begin
data[11:
8]<=0;
if(data[15:
12]==9)
begin
data[15:
12]<=0;
end
elsedata[15:
12]<=data[15:
12]+1;
end
elsedata[11:
8]<=data[11:
8]+1;
end
elsedata[7:
4]<=data[7:
4]+1;
end
elsedata[3:
0]<=data[3:
0]+1;
end
if(key3==1)
begin
if(data[3:
0]==0)
begin
data[3:
0]<=9;
if(data[7:
4]==0)
begin
data[7:
4]<=9;
if(data[11:
8]==0)
begin
data[11:
8]<=9;
if(data[15:
12]==0)
begin
data[15:
12