广东高考英语试题及答案.docx

广东高考英语试题及答案.docx

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广东高考英语试题及答案

英文资料及中文翻译

OneAbriefintroductionofDDSsystem

1thebasicprincipleofDDS

ThebasicprincipleistouseDDSsamplingtheorem,throughthequeryingmethodproducewaveform.ThestructureofDDShasalotofkinds,thebasicofthecircuitprincipleavailablefigure1-1tosaid.

K

Fs

FO

Figure1-1DDSschematic

PhaseaccumulatorsbyNaadderandNaaccumulateregisterscascadecomposition.Eachtoaclockpulsefs,adderwillfrequencycontrolwordkandaccumulateregisterstheaccumulationphaseoutputdatatogetherandaddtheresultsofdatasenttoaccumulateregisterinput.Accumulateregistersadderwilllastclockpulsethatisproducedwhenthenewroleofthephasetotheadderfeedbackdatainput,sothattheaddernextclockpulseundertheeffectoffrequencycontrolwordtocontinuewithaddingtogether.So,phaseaccumulatorsundertheactionoftheclock,increasingthefrequencycontrolwordtolinearphasetoattack.Canseefromthis,phaseaccumulatorsineachclockpulseinput,thefrequencycontrolwordaccumulatea,phaseaccumulatorsoutputdataisthesignalofthesyntheticphase,phaseaccumulatorsspilloverfrequencyisthesignalfrequencyDDSoutput.Usingphaseaccumulatorsoutputdataaswaveformmemory（ROM）ofthephaseofthesamplingaddress,sojustputthestoredinmemoryofthewaveformsamplingwaveforminvalue（binarycode）findoutbythelook-uptable,completedphasetoamplitudeconversion.TheoutputwaveformmemorytoD/Aconverter,D/Aconverteristhedigitalquantityofthewaveformamplitudeconvertrequiredamountoffrequencysynthesissimulationformsignal.Low-passfilterusedtofilteroutdonotneedtosampleweight,sothattheoutputspectrumpuresinewavesignal.DDSinrelativebandwidth,frequencyconversiontime,highresolution,phasecontinuity,orthogonaloutputandaseriesofintegratedperformanceindexesfarmorethanthetraditionalfrequencysynthesistechnologycanreachthelevel,forthesystemtoprovidethesuperiorperformanceofsimulationsignalsource.

2DDSperformancecharacteristics

（1）theoutputfrequencyrelativebandwidthiswide

Outputfrequencybandwidthfor50%fs（thetheoreticalvalue）.Butconsideringthelow-passfilterfeaturesanddesignofdifficultyandtheoutputsignalstraysuppression,theactualoutputfrequencybandwidthstillcanreach40%fs.

（2）frequencyconversiontimeisshort

DDSisaopenloopsystem,withoutanyfeedbackpart,thisstructuremakesDDSoffrequencyconversiontimeisveryshort.Infact,inthefrequencyofDDScontrolwordafterthechangesrequiredtopassthroughaclockcycleaccordingtothenewphaseafterincrementalaccumulate,canrealizefrequencyconversion.Therefore,frequencyconversioncontrolwordfrequencyisequaltothetimeoftransmissiontime,alsoisaclockcycletime.Theclock,thehigherthefrequency,thetransitiontimeisshorter.ThefrequencyconversiontimeDDSDanasecondsordersofmagnitude,thefrequencyofuseotherthansyntheticmethodsareshortseveralordersofmagnitude.

（3）thefrequencyresolutionisextremelyhigh

Iftheclockfrequencyoffschangeless,thefrequencyofDDSbyphaseaccumulatorsresolutionofthedigitsNdecision.AslongastheincreaseofthephaseaccumulatorsdigitsNcanobtainarbitrarilysmallfrequencyresolution.Atpresent,mostoftheresolutionofthe1HzDDSinorderofmagnitude,manylessthan1MHzevensmaller.

（4）continuousphasechanges

ChangeDDSoutputfrequency,infactchangedeachclockcycleofthephaseofthedelta,phasefunctioncurveiscontinuous,justinthefrequencyofthefrequencychangemomenthappenedmutations,sokeepthesignalphasecontinuity.

（5）theflexibilityofoutputwaveform

AslongastheinternalandthecorrespondingcontrolsuchasDDSFMcontrolFM,phase-modulationcontrolPMandanAMcontrolAM,thatcanbeflexibletorealizeFM,jammingandanAMfunction,produceFSK,PSK,ASKandMSKsignaletc.Inaddition,aslongasthewaveformDDSinmemorystoredifferentwaveforms,canachieveallkindsofoutputwaveform,suchastrianglewave,thesawtoothwaveandrectangularwaveevenanywaveform.WhenthewaveformmemorystorageDDSrespectivelysineandcosinefunctionstable,wecangetthetwoorthogonalwayoutput.

（6）otheradvantages

BecauseinalmostallpartsofDDSbelongstothedigitalcircuit,easytointegration,lowpowerconsumption,smallvolume,lightweight,highreliability,andeasytoprogram,useaflexible,sohighperformancetopriceratio.

TwoAT89S52SCMprofile

AT89S52devicesforATMELbytheproductionofalowpowerconsumption,highperformanceCMOS8amicrocontroller,andhas8KinsystemprogrammableFlsahmemory.

1AT89S52devicesmainfunctionlistsareasfollows:

1,haveclever8bitsCPUandinthesystemprogrammableFlash

2,thechipwithinternalclockoscillator（thehighestworkingfrequencytotraditional12MHz）

3,internalprogrammemory（ROM）for8KB

4,internaldatamemory（RAM）for256bytes

5,32programmableI/Omouthline

6,8interruptvectorsource

7,three16timer/counter

8,level3encryptionprogrammemory

9,full-duplexUARTserialchannel

2andAT89S52deviceseachpinfunctionisintroduced:

VCC:

AT89S52devicespoweristheinput,meet+5V.

VSS:

Thepowertoend.

XTAL1:

Singlechipsystemclockofinverseamplifierinputterminal.

XTAL2:

Thesystemclockinverseamplifieroutputterminal,generallyinthedesignaslongasXTAL1andputtheXTAL2inaquartzcrystaloscillationsystemcanaction,inadditiontothetwopinsandtojoina20PFbetweenthesmallcapacitance,canmakethesystemmorestable,avoidnoiseinterferenceandcrash.

RESET:

AT89S52devicesresetpin,highlevelaction,whentochipreset,aslongasthispinleveluptohighlevelandkeeptwomachinecyclemoretime,AT89S51andcanfinishthevariousmovementsofthesystemreset,makeinternalspecialfunctionoftheregistercontentsshallbesettotheknowncondition,andtoaddress0000Hbegantoreadinaprogramcodeandexecutionprocedures.

EA/Vpp:

"EA"forEnglish"ExternalAccess"oftheabbreviations,saidAccessExternalprogramcodeofItaly,lowlevelaction,thatiswhenthispinmeetlowlevel,thesystemwillAccessExternalprogramcode（storedinExternalEPROM）toexecuteaprogram.Soin8031and8032,EApinmustmeetlowlevel,becauseitsinternalnoprogrammemoryspace.Ifistheuseoftheinternalprocess8751space,thepintopickupintohighlevel.Inaddition,theprogramcodein8751whenthedrivetointernalEPROM,canusethepintoinputandVburnhighpressure（Vpp）.

ALE/PROG:

ALEisEnglish"AddressLatchEnable"oftheabbreviations,saidAddresslatchesEnablesignal.AT89S52devicescanuseapintotriggertheexternaleightlatches（suchas74LS373）,willport0addressbus（A0-A7）lockintothelatches,becauseinmanywaysofAT89S52worksendaddressanddata.AtordinarytimesintheprogramexecutionALEtheoutputofthepinfrequencyisabout1/6oftheworkingfrequencyofthesystem,anditcanbeusedtodrivetheotherperimeterofthechip,andtheinput.Inadditionthedrivein8751theprogramcode,thepinswillbeasthespecialprogrammingfunctiontouse.

PSEN:

Thisas"ProgramStoreEnable"abbreviation,itsmeaningfortheProgramtoStoreopening,when8051weresetbecomeexternalProgramcodereadworkmode（EA=0）,willsendthesignalinordertoobtaintheProgramcode,usuallythesupportingfeetisreceivedEPROMOEthefeet.AT89S52devicescanusePSENandRDpinexistingexternalopeningrespectivelyRAMandEPROM,allowthedatastorageandprogrammemorycanbecombinedtogetherandshare64Kaddressedrange.

PORT0（P0.0~P0.7）:

Port0isa8bitswideOpenDrain（OpenDrain）two-wayI/oport,atotalofeightbit,P0.0saida0,P0.1saida1,byanalogy.TheotherthreeI/Oport（P1,P2,P3）doesnothavethiscircuitconfiguration,butinternaloneascensioncircuit,P0inasI/OonlycanpusheighttheLSTTLload.IfwhenEApinforlowelectricityatordinarytimes（i.e.accessexternalprogramcodeordatastorage）,inmanywaysP0workprovidetheaddressbus（A0-A7）andthedatabus（D0~D7）.Thedesignershouldbepluslatcheswillport0sendoutaddressswitchtolockbecomeA0-A7,togetherwiththeport2sendouttheA8~A15tosynthesizeacomplete16theaddressbus,andaddressedtothe64Kexternalmemoryspace.

PORT2（P2.0~P2.7）:

Port2isacircuitoftheinternalascensiontwo-wayI/Oport,eachpincanpushfourtheLSTTLload,iftheport2outputsettohighelectricityatordinarytimes,thisportcanbeasinputtouse.ExceptasgeneralP2I/Oportuseoutside,ifintheexternalexpansionprogrammemoryAT89S52ordatastorage,andprovidetheaddressbushighbyteA8~A15,thistimeP2cannotasI/Otouse.

PORT1（P1.0~P1.7）:

Port1alsoistohaveinternalascensioncircuittwo-wayI/Oport,theoutputbuffercanpushfourLSTTLload,asiftheport1outputsettohighlevel,isthisporttoinputdata.Ifistousethe8052or8032words,P1.0andastheexternalinputpulsetimer2feet,andP1.1canhaveT2EXfunction,candoexternalinterruptionofinputfeetatrigger.

PORT3（P3.0~P3.7）:

Port3alsohaveinternalascensioncircuittwo-wayI/Oport,theoutputbuffercanpushfourTTLload,andalsomanyotheradditionaltoolshavespecialfunction,includingserialcommunication,andexternalinterruption,controlandtimecountcontrolandexternaldatamemoryreadorwritetocontentcontroletc.Function.

Thedistributionofpinsareasfollows:

P3.0:

RXD,serialcommunicationinput.

P3.1:

TXD,serialcommunicationoutput.

P3.2:

INT0,externalinterruption0input.

P3.