梁祝程序.docx

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梁祝程序

 梁祝电子琴程序

LIBRARYIEEE;--硬件演奏电路顶层设计

USEIEEE.STD_LOGIC_1164.ALL;

ENTITYSongerIS                                   

PORT(  CLK12MHZ:

INSTD_LOGIC;            --音调频率信号        

              CLK8HZ  :

INSTD_LOGIC;              --节拍频率信号

              CODE1 :

OUTSTD_LOGIC_VECTOR(3DOWNTO0);--简谱码输出显示

              HIGH1 :

OUTSTD_LOGIC;--高8度指示

            SPKOUT  :

OUTSTD_LOGIC);--声音输出

 END;

ARCHITECTUREoneOFSongerIS

  COMPONENTNoteTabs

    PORT(clk   :

INSTD_LOGIC;

        ToneIndex:

OUTSTD_LOGIC_VECTOR(3DOWNTO0));

   ENDCOMPONENT;

   COMPONENTToneTaba

       PORT(Index:

 IN STD_LOGIC_VECTOR(3DOWNTO0);

              CODE :

OUT STD_LOGIC_VECTOR(3DOWNTO0);

              HIGH :

OUTSTD_LOGIC;

              Tone :

OUT STD_LOGIC_VECTOR(10DOWNTO0));

   ENDCOMPONENT;

   COMPONENTSpeakera

       PORT (clk :

INSTD_LOGIC;

               Tone:

INSTD_LOGIC_VECTOR(10DOWNTO0);

               SpkS:

OUTSTD_LOGIC );

   ENDCOMPONENT;

   SIGNALTone:

STD_LOGIC_VECTOR(10DOWNTO0);

   SIGNALToneIndex:

STD_LOGIC_VECTOR(3DOWNTO0);

 BEGIN

u1:

NoteTabs PORTMAP(clk=>CLK8HZ,ToneIndex=>ToneIndex);

u2:

ToneTabaPORTMAP(Index=>ToneIndex,Tone=>Tone,CODE=>CODE1,HIGH=>HIGH1);

u3:

SpeakeraPORTMAP(clk=>CLK12MHZ,Tone=>Tone,SpkS=>SPKOUT);

END;

 

 

LIBRARYIEEE;

USEIEEE.STD_LOGIC_1164.ALL;

USEIEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITYNoteTabsIS

PORT(clk   :

INSTD_LOGIC;

       ToneIndex:

OUTSTD_LOGIC_VECTOR(3DOWNTO0));

END;

ARCHITECTUREoneOFNoteTabsIS

COMPONENTMUSIC               --音符数据ROM

 PORT(address:

INSTD_LOGIC_VECTOR(7DOWNTO0);

  inclock:

INSTD_LOGIC;

        q:

OUTSTD_LOGIC_VECTOR(3DOWNTO0));

ENDCOMPONENT;

   SIGNALCounter:

 STD_LOGIC_VECTOR(7DOWNTO0);

BEGIN

   CNT8:

PROCESS(clk,Counter)

   BEGIN

       IFCounter=138THEN Counter<="00000000";

       ELSIF(clk'EVENTANDclk='1')THENCounter<=Counter+1;ENDIF;

   ENDPROCESS;

 u1:

MUSICPORTMAP(address=>Counter,q=>ToneIndex,inclock=>clk);

 END;

LIBRARYIEEE;

USEIEEE.STD_LOGIC_1164.ALL;

USEIEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITYSpeakeraIS

PORT(  clk :

INSTD_LOGIC;

            Tone:

INSTD_LOGIC_VECTOR(10DOWNTO0);

            SpkS:

OUTSTD_LOGIC );

ENDSpeakera;

ARCHITECTUREoneOFSpeakeraIS

   SIGNALPreCLK,FullSpkS:

STD_LOGIC;

BEGIN

 DivideCLK:

PROCESS(clk)

       VARIABLECount4:

STD_LOGIC_VECTOR(3DOWNTO0);

   BEGIN

       PreCLK<='0'; -- 将CLK进行16分频,PreCLK为CLK的16分频

       IFCount4>11THENPreCLK<='1'; Count4:

="0000";

       ELSIFclk'EVENTANDclk='1'THEN Count4:

=Count4+1;    

       ENDIF;

   ENDPROCESS;

   GenSpkS:

PROCESS(PreCLK,Tone)--11位可预置计数器

       VARIABLECount11:

STD_LOGIC_VECTOR(10DOWNTO0);

BEGIN

     IFPreCLK'EVENTANDPreCLK='1'THEN

      IFCount11=16#7FF#THENCount11:

=Tone;FullSpkS<='1'; 

           ELSECount11:

=Count11+1;FullSpkS<='0';ENDIF;

       ENDIF;

  ENDPROCESS;

 DelaySpkS:

PROCESS(FullSpkS)--将输出再2分频,展宽脉冲,使扬声器有足够功率发音

       VARIABLECount2:

STD_LOGIC;

BEGIN

   IFFullSpkS'EVENTANDFullSpkS='1'THEN Count2:

=NOTCount2;

           IFCount2='1'THEN SpkS<='1';

           ELSESpkS<='0'; ENDIF;

       ENDIF;

   ENDPROCESS;

END;

 

LIBRARYIEEE;

USEIEEE.STD_LOGIC_1164.ALL;

ENTITYToneTabaIS

PORT(Index:

 IN STD_LOGIC_VECTOR(3DOWNTO0);

          CODE :

OUT STD_LOGIC_VECTOR(3DOWNTO0);

          HIGH :

OUTSTD_LOGIC;

          Tone :

OUT STD_LOGIC_VECTOR(10DOWNTO0));

END;

ARCHITECTUREoneOFToneTabaIS

BEGIN

   Search:

PROCESS(Index)

   BEGIN

       CASEIndexIS    --译码电路,查表方式,控制音调的预置数

WHEN"0000"=>Tone<="11111111111";CODE<="0000";HIGH<='0';--2047

  WHEN"0001"=>Tone<="01100000101";CODE<="0001";HIGH<='0';--773;

  WHEN"0010"=>Tone<="01110010000";CODE<="0010";HIGH<='0';--912;

  WHEN"0011"=>Tone<="10000001100";CODE<="0011";HIGH<='0';--1036;

  WHEN"0101"=>Tone<="10010101101";CODE<="0101";HIGH<='0';--1197;

  WHEN"0110"=>Tone<="10100001010";CODE<="0110";HIGH<='0';--1290;

  WHEN"0111"=>Tone<="10101011100";CODE<="0111";HIGH<='0';--1372;

  WHEN"1000"=>Tone<="10110000010";CODE<="0001";HIGH<='1';--1410;

  WHEN"1001"=>Tone<="10111001000";CODE<="0010";HIGH<='1';--1480;

  WHEN"1010"=>Tone<="11000000110";CODE<="0011";HIGH<='1';--1542;

  WHEN"1100"=>Tone<="11001010110";CODE<="0101";HIGH<='1';--1622;

  WHEN"1101"=>Tone<="11010000100";CODE<="0110";HIGH<='1';--1668;

  WHEN"1111"=>Tone<="11011000000";CODE<="0001";HIGH<='1';--1728;

  WHENOTHERS=>NULL;

  ENDCASE;

  ENDPROCESS;

END;

 

 

--Copyright(C)1991-2006AlteraCorporation

--YouruseofAlteraCorporation'sdesigntools,logicfunctions

--andothersoftwareandtools,anditsAMPPpartnerlogic

--functions,andanyoutputfilesanyoftheforegoing

--(includingdeviceprogrammingorsimulationfiles),andany

--associateddocumentationorinformationareexpresslysubject

--tothetermsandconditionsoftheAlteraProgramLicense

--SubscriptionAgreement,AlteraMegaCoreFunctionLicense

--Agreement,orotherapplicablelicenseagreement,including,

--withoutlimitation,thatyouruseisforthesolepurposeof

--programminglogicdevicesmanufacturedbyAlteraandsoldby

--Alteraoritsauthorizeddistributors. Pleaserefertothe

--applicableagreementforfurtherdetails.

--QuartusIIgeneratedMemoryInitializationFile(.mif)

WIDTH=4;

DEPTH=256;

ADDRESS_RADIX=UNS;

DATA_RADIX=UNS;

CONTENTBEGIN

 00:

3;

 01:

3;

 02:

3;

 03:

3;

 04:

5;

 05:

5;

 06:

5;

 07:

6;

 08:

8;

 09:

8;

 10:

8;

 11:

9;

 12:

6;

 13:

8;

 14:

5;

 15:

5;

 16:

12;

 17:

12;

 18:

12;

 19:

15;

  20:

13;

 21:

12;

 22:

10;

 23:

12;

 24:

9;

 25:

9;

 26:

9;

 27:

9;

 28:

9;

 29:

9;

  30:

9;

 31:

0;

 32:

9;

 33:

9;

 34:

9;

 35:

10;

 36:

7;

 37:

7;

 38:

6;

 39:

6;

  40:

5;

 41:

5;

 42:

5;

 43:

6;

 44:

8;

 45:

8;

 46:

9;

 47:

9;

 48:

3;

 49:

3;

  50:

8;

 51:

8;

 52:

6;

 53:

5;

 54:

6;

 55:

8;

 56:

5;

 57:

5;

 58:

5;

 59:

5;

 60:

5;

 61:

5;

 62:

5;

 63:

5;

 64:

10;

 65:

10;

 66:

10;

 67:

12;

 68:

7;

 69:

7;

 70:

9;

 71:

9;

 72:

6;

 73:

8;

 74:

5;

 75:

5;

 76:

5;

 77:

5;

 78:

5;

 79:

5;

 80:

3;

 81:

5;

 82:

3;

 83:

3;

 84:

5;

 85:

6;

 86:

7;

 87:

9;

 88:

6;

 89:

6;

 90:

6;

 91:

6;

 92:

6;

 93:

6;

 94:

5;

 95:

6;

 96:

8;

 97:

8;

 98:

8;

 99:

9;

 100:

12;

 101:

12;

 102:

12;

 103:

10;

 104:

9;

 105:

9;

 106:

10;

 107:

9;

 108:

8;

 109:

8;

 110:

6;

 111:

5;

 112:

3;

 113:

3;

 114:

3;

 115:

3;

 116:

8;

 117:

8;

 118:

8;

 119:

8;

 120:

6;

 121:

8;

 122:

6;

 123:

5;

 124:

3;

 125:

5;

 126:

6;

 127:

8;

 128:

5;

 129:

5;

 130:

5;

 131:

5;

 132:

5;

 133:

5;

 134:

5;

 135:

5;

 136:

0;

 137:

0;

 138:

0;

END;

Tone源程序

--TONE

LIBRARY IEEE;

USEIEEE.STD_LOGIC_1164.ALL;

ENTITYTONE IS                   --引导TONE的子模块实体部分

PORT(INDEX:

INSTD_LOGIC_VECTOR(7DOWNTO0);  --键盘输入

     CODE:

OUTINTEGERRANGE 0TO 15;--输出对应的输入音阶简谱的显示数码

     HIGH:

OUTSTD_LOGIC;

     TONE:

OUTINTEGER RANGE 0TO16#7FF#);

END;

ARCHITECTURE ONEOFTONEIS

BEGIN        --BEGIN以下直到END为该模块的功能描述语句

 SENRCH:

PROCESS(INDEX)

BEGIN

   CASE INDEX IS         --译码电路,查表方式,控制音调的预置数

          WHEN"00000001"=>TONE<=773;CODE<=1;HIGH<='0';

          WHEN"00000010"=>TONE<=912;CODE<=2;HIGH<='0';

          WHEN"00000100"=>TONE<=1036;CODE<=3;HIGH<='0';

          WHEN"00001000"=>TONE<=1116;CODE<=4;HIGH<='0';

          WHEN"00010000"=>TONE<=1197;CODE<=5;HIGH<='0';

          WHEN"00100000"=>TONE<=1290;CODE<=6;HIGH<='0';

          WHEN"01000000"=>TONE<=1372;CODE<=7;HIGH<='0';

          WHEN"10000000"=>TONE<=1410;CODE<=1;HIGH<='1';

          WHENOTHERS=>TONE<=2047;CODE<=0;HIGH<='0';

   ENDCASE;

 ENDPROCESS;           --进程语句结束

END;

 

Speaker源程序

--SPEAKER

LIBRARY IEEE;

USEIEEE.STD_LOGIC_1164.ALL;

ENTITYSPEAKER IS

PORT(CLK1:

INSTD_LOGIC;   --输入时钟脉冲

   TONE1:

ININTEGERRANGE0TO16#7FF#;

   SPKS:

OUTSTD_LOGIC);

END;

ARCHITECTURE ONEOFSPEAKERIS

SIGNALPRECLK,FULLSPKS:

STD_LOGIC;

BEGIN

DIVIDECLK:

PROCESS(CLK1)

VARIABLECOUNT4:

INTEGERRANGE0TO15;

BEGIN

    PRECLK<='0';         --将CLK进行16分频,PRECLK为CLK的16分频

      IFCOUNT4>11THEN      --开始IF语句

        PRECLK<='1';

      COUNT4:

=0;

    ELSIFCLK1'EVENTANDCLK1='1'THEN

      COUNT4:

=COUNT4+1;

    ENDIF;          --IF语句结束

ENDPROCESS;

GENSPKS:

PROCESS(PRECLK,TONE1)        --11位可预置计数器

VARIABLECOUNT11:

INTEGERRANGE0TO16#7FF#;

BEGIN

 IFPRECLK'EVENTANDPRECLK='1'THEN

     IFCOUNT11=16#7FF#THEN

        COUNT11:

=TONE1;

        FULLSPKS<='1';

      ELSE

        COUNT11:

=COUNT11+1;

        FULLSPKS<='0';

       ENDIF;           --IF语句结束

     ENDIF;

ENDPROCESS;

DELAYSPKS:

PROCESS(FULLSPKS)         --将输出再二分频,展宽脉冲,使扬声器有足够的功率发音

VARIABLECOUNT2:

STD_LOGIC;

BEGIN

 IFFULLSPKS'EVENTANDFULLSPKS='1'THEN

           COUNT2:

=NOTCOUNT2;

           IFCOUNT2='1'THEN

                SPKS<='1';

           ELSESPKS<='0';

          ENDIF;

        ENDIF;

      ENDPROCESS;            --由PROCESS引导的进程语句结束

   END;

 

Top源程序

--TOP

LIBRARY IEEE;

USEIEEE.STD_LOGIC_1164.ALL;

ENTITYTOP IS

PORT(CLK12MHZ:

INSTD_LOGIC;           --音调频率信号

    INDEX1:

INSTD_LOGIC_VECTOR(7DOWNTO0);       --简谱码输出显示

    CODE1:

OUTINTEGERRANGE0TO15;

    HIGH1,SPKOUT:

OUTSTD_LOGIC);        --声音输出

    END;

    ARCHITECTUREONEOFTOPIS

    COMPONENTTONE

    PORT(INDEX:

INSTD_LOGIC_VECTOR(7DOWNTO0);

          CODE:

OUTINTEGERRANGE0TO15;

          HIGH:

OUTSTD_LOGIC;

          TONE:

OUTINTEGERRANGE0TO16#7FF#

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