非接触式智能IC卡中英文对照外文翻译文献.docx

非接触式智能IC卡中英文对照外文翻译文献.docx

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非接触式智能IC卡中英文对照外文翻译文献

中英文资料外文翻译

（文档含英文原文和中文翻译）

外文资料

ANewContact-lessSmartCardICUsinganOn-ChipAntennaandanAsynchronousMicro-controller

Abstract—ThispaperdescribesanewgenerationofContact-lessSmartCardChipwhichintegratesanon-chipcoilconnectedtoapowerreceptionsystemandanemitter/receivermodulecompatiblewiththeIS014443standard,togetherwithanasynchronousquasi-delayinsensitive（QDI）8-bitmicro-controller.BeyondtheContact-lessSmartCardapplicationfield,thisnewchipdemonstratesthatsystem-on-chipintegratingpowerreceptionandmanagement,radio-frequencycommunication,andsignalprocessingisfeasible.Itassociatesanalog/digitalpartsaswellassynchronous/asynchronouslogicsandhasbeenfabricatedinaCMOSsixmetallayers0.25--

mtechnologyfromST-Micro-electronics.

IndexTerms—Asynchronousprocessor,coil-on-chip,quasi-delayinsensitivecircuits,SmartCards,system-on-chip.

I.INTRODUCTION

TheSmartCardmarketentersanewera,withaboomingnumberofapplicationsinvariousdomainsandnewcountrieswillingtousethistechnology.

SmartCardsarebecomingmoreandmoreubiquitousandthetrendistointegrateacardreaderinallkindofequipment（PCs,PDAs,mobilephones,etc.）.E-commerce,citizenadministration,andotherscouldbe,throughtheInternet,goodvehiclestoallowserviceproviderstodevelopnewservicesusingtheSmartCardasahigh-securitykeyelement.

Inthiscontext,contact-lessSmartCardsshouldplayanimportantpart.Theabsenceofcontactinduceslowermaintenancecost,improveseaseofuse,reliability,and,therefore,end-usersatisfaction.Theyaredeclinedinseveraltypesaccordingtothelocationoftheantenna.Itcanbeonthecard,onthemodule,orintegrateddirectlyonthechip.Thislatertechniquesignificantlydecreasescardfabricationcost.Moreover,astheuserstillinsertshiscardinareaderslot,transactionsremainassafeaswhenusingcardswithcontacts.Sincemostapplicationsrequirelow-costlow-powersystems,thegoalofthisworkistointegrateonasinglechipanantenna,anISO14443compliantradio-frequencyemitter/receiver,togetherwithanasynchronousmicro-controller.Integratingthewholesystemonsiliconshouldpavethewaytonewreliablelow-costContact-lessSmartCardchips.

ThesemainkeytechnologiesusedtodesignthisnewSmartCardchiparepresentedinSectionII.TheSmartCardchipde-signisdetailedinSectionIII,andthedesignmethodologyisbrieflydescribedinSectionIV.ExperimentalresultsaregiveninSectionV.

II.INNOVATION

Theinnovationofthischipliesintheassociationonthesamedieoftwokeytechnologies[9]:

anintegratedpowerreceptionsystemwithanon-chipcoil[5],andan8-bitCISCQDIasynchronousmicro-controller[8].Thisassociationenablesustotakeadvantageoftheasynchronouslogicpropertiesinordertodecreasethedesignconstraintsoftheintegratedpowerreceptionsystemandalsotoincreasetheworkingdomainofthedigitalprocessingpart.

Infact,theasynchronouslogichasthreeinterestingadvantagesvaluablefortheContact-lessSmartCardapplicationconsideredhere[6],[7].Insteadofbeingclockdriven,asynchronouscircuitsaredatadrivenwhichresultsinalowermean-powerconsumption.Insteadofimplementingacentralcontrolunit,asynchronouscircuitsimplementadistributedcontrolsystemwhichresultsinsmallercurrentpeaksandthenlowerelectromagneticemissionbecausetheelectricalactivityisspreadovertime.Finally,insteadofbeing“clocktimed”,asynchronouscircuitsareself-timedwhichenablesanautomaticregulationoftheperformance.Hence,QDIasynchronouscircuitsarenotsensitivetovoltagevariations,andrunsattheirmaximumspeedwithrespecttothepowerreceived.

SincetheQDI8-bitmicro-controllerissorobustwithrespecttothepowersupplyvariations（seeSectionIII）,thedesignofthepowerreceptionsystemismadeeasier:

loweraveragepowerdelivered,aswellasthepeakpower,andsimplifiedregulationofthesupplyvoltage.Thisnotonlymakesthedesigneasier,butalsodecreasesthearea（smallerVDDsmoothingcapacitance）.Finally,becauseofitslowcurrentpeakstheQDIasynchronousmicro-controllerdoesnotinterferewiththeloadmodulationusedintheISO14443standardforthecommunicationbetweenthecardandthereader.Thisenablesthemicro-controllertorunwhilethechipistransferringdatatothereaderwhichdecreasesthecomplexityofthesoftwareandthenthememoryspacerequirements.

III.SMARTCARDCHIPDESIGN

TheSmartCardchipiscomposedoffourmainblocks（Fig.1）.TheRFfront-endrecoverspowerfromtheintegratedantenna,whichformsatransformerwiththeexternalreaderantenna.Therecoveredpoweristhenstabilizedandsuppliesthewholechip:

theasynchronousmicro-controllerandasynchronousdedicatedinterfacebetweentheRFblockandtheasynchronouscircuit.

Fig.1.Chiparchitecture.

Thisinterfaceisdrivenbyareception-enablesignal（REN）controlledbythemicro-controller.Inreceptionmode,theRFinterfacedemodulatesdatasentbythereader.Inemissionmode,dataaresenttothereaderusingaloadmodulation.ThesystemisISO14443-Bcompliant[10].

WhentheSmartCardisinsertedinthereaderslot,assoonasthestabilizedsupplyreachesasufficientlevel,resetisactivatedbytheRFinterface.Themicro-controllerexecutesthebootprogramcontainedinROMandthenwaitsfordatacomingfromthereader.ThecommunicationbetweenthereaderandtheSmartCardisfunctionallyasynchronous.ThecombinationoftheRENsignalandthestartandstopbits（thecommunicationbetweenthereaderandthechipismadeonanasynchronousmode,withstartandstopbits）,encapsulatingthetransmittedbyteimplementsahalf-duplexcommunication.

A.AnalogBlockDesign

Sincetherearenocontacts,poweranddataarerecoveredfromRFsignalsemittedbythereader.Theanalogblockisinchargeof

1）poweringthechip;

2）demodulating/modulatingdatafrom/tothereader;

3）recoveringtheclockusedinthesynchronous/asynchronousinterface.

Comparedtoothercontact-lesstechnologies[7],thecardisinsertedinaslotwhichensuresthatthedistancechipreaderiskeptconstantandsmall:

thevariationsindistancearewithinmillimeters.Thisenablestheintegrationofthecoilon-chip.Then,thereisnoneedforthevoltagewhichisrecoveredfromtheRFpowertobeverywellregulated,asitisthecaseforcontact-lesscardswhichoperateona“touchandgobasis.”Thedesignofthepowermanagementandanalogblockcircuitryisaccordinglysimplified.

TheblockdiagramoftheRFfront-endisdescribedinFig.2.Itisbuiltofthefollowingparts.

1）Thefullwaverectifier（FWR）isabridgecomposedofnMOSandpMOStransistors.Theelectro-motive-force（EMF）inducedintheon-chipantennaisappliedtotheFWRinputs.Thenegativeoutputisconnectedtothebulkandthepositiveoutputisconnectedtoa500pFsmoothingcapacitor.ItdeliversthenonregulatedvoltageNRVtothechip.

Fig.2.RFfront-endblockdiagram

2）Theclockrecoveryblockextractsthe13.56-MHzclockfromtheRFcarriersignal.Forthispurpose,theinputofaSchmidttriggerisconnectedtooneofthetwoantennaterminals.

3）Thepower-ondetector.Thisblockiscomposedofavoltagereference,adifferentialcomparatorandfilterstorejectmodulationparasitics.IttriggersaRESETwhentheNRVreachesagivenlevel.

4）ThedatademodulatorisbasedonNRVamplitudetransitionsduetoNRZcodedtransmissionfromreadertochip.ThedatademodulatorextractsthedatamixedwithNRV,bydetectingnegativeandpositivetransitions.ThetwooutputsdrivetheinputsofanRSlatchwhichmakesthedataavailabletotheinterface.

5）Theloadmodulatorisbuiltofaresistor（Rmod,seeFig.3）switchedbyannMOStransistorcontrolledbythedatatobesenttothereader.Itinducesanamplitudemodulationintheinductorantenna.Inemission,themodulatorhastomodulatethepowerabsorbedbythechipatan847-kHzBPSKrhythm.ThisismadebyamodulationofI（NRV）,

.ThisinducesanEMFinthereadersolenoid.TheEMFvalueis

whereisthemutualinductorandthecarrierfrequency.

Fig.3.Powermanagement

6）Thecurrentgeneratorisassociatedwithazenerdiodetoachievepowerregulation.

Aswewantinformationtobetransmittedtothereaderwhenthemicrocontrollerisrunning,andsincealoadmodulationisused,caremustbetakentothedynamiccurrentconsumptionofthemicro-controllerwhichcaninduceNRVcurrentvariationsandthencorruptthecommunication.Topreventthisphenomenafromoccurring,aconstantcurrentsourceisusedtofeedthelogictogetherwitha2-Vshuntvoltagestabilizer.Theconstantcurrentgeneratorisdesignedtoprovidethemaximumcurrentneededbythelogicpart.ThismechanismensuresaconstantNRVcurrentandthereforeavoidsparasiticloadmodulationthatcouldbeinducedbysoftwarerunninginthemicro-controller（Fig.4）.

Fig4.VDDandI（NRV）versusI（load）.

Inthisprototype,thecurrentgeneratorisdesignedtodeliver15mAinordertosupplythemicro-controlleraswellasanexternalnonvolatilememoryincludedinademonstratorunderdevelopment.

B.Synchronous/AsynchronousInterface

TheblockdiagramoftheinterfaceispresentedinFig.5.Itiscomposedofadivider,aBPSKmodulatorandablockwhichformatsthedatacomingfromtheexternalreaderandfromthemicro-controller.TheRF13.56-MHzcarrierisrecoveredanddividedtoprovidea847-kHzsignalusedto

clocktheinterface.OntheRFinterfaceside,bytesareencapsulatedwithstartandstopbitswhicharethenreceivedoremittedsequentiallyatthe847-kHzbitr