通用异步接收发送器外文翻译文档格式.docx

通用异步接收发送器外文翻译文档格式.docx

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Communicationmaybe"

fullduplex"

（bothsendandreceiveatthesametime）or"

halfduplex"

（devicestaketurnstransmittingandreceiving）.

Asof2008,UARTsarecommonlyusedwithRS-232forembeddedsystemscommunications.ItisusefultocommunicatebetweenmicrocontrollersandalsowithPCs.ManychipsprovideUARTfunctionalityinsilicon,andlow-costchipsexisttoconvertlogiclevelsignals（suchasTTLvoltages）toRS-232levelsignals（forexample,Maxim'

sMAX232）.

Asynchronousreceiveandtransmit

Inasynchronoustransmitting,teletype-styleUARTssenda"

start"

bit,fiveto

eightdatabits,least-significant-bitfirst,anoptional"

parity"

bit,andthenone,oneandahalf,ortwo"

stop"

bits.Thestartbitistheoppositepolarityofthedata-line'

sidlestate.Thestopbitisthedata-line'

sidlestate,andprovidesadelaybeforethenextcharactercanstart.（Thisiscalledasynchronousstart-stoptransmission）.Inmechanicalteletypes,the"

bitwasoftenstretchedtotwobittimestogivethemechanismmoretimetofinishprintingacharacter.Astretched"

bitalsohelpsresynchronization.

Theparitybitcaneithermakethenumberof"

one"

bitsbetweenanystart/stoppairodd,oreven,oritcanbeomitted.Oddparityismorereliablebecauseitassuresthattherewillalwaysbeatleastonedatatransition,andthispermitsmanyUARTstoresynchronize.

Insynchronoustransmission,theclockdataisrecoveredseparatelyfromthedatastreamandnostart/stopbitsareused.Thisimprovestheefficiencyoftransmissiononsuitablechannelssincemoreofthebitssentareusabledataandnotcharacterframing.Anasynchronoustransmissionsendsnocharactersovertheinterconnectionwhenthetransmittingdevicehasnothingtosend--onlyidlestopbits;

butasynchronousinterfacemustsend"

pad"

characterstomaintainsynchronismbetweenthereceiverandtransmitter.TheusualfilleristheASCII"

SYN"

character.Thismaybedoneautomaticallybythetransmittingdevice.

USARTchipshavebothsynchronousandasynchronousmodes.

SerialtoParallelAlgorithm

Asynchronoustransmissionallowsdatatobetransmittedwithoutthesenderhavingtosendaclocksignaltothereceiver.Instead,thesenderandreceivermustagreeontimingparametersinadvanceandspecialbitsareaddedtoeachwordwhichareusedtosynchronizethesendingandreceivingunits.

WhenawordisgiventotheUARTforAsynchronoustransmissions,abitcalledthe"

StartBit"

isaddedtothebeginningofeachwordthatistobetransmitted.TheStartBitisusedtoalertthereceiverthatawordofdataisabouttobesent,andtoforcetheclockinthereceiverintosynchronizationwiththeclockinthetransmitter.Thesetwoclocksmustbeaccurateenoughtonothavethefrequencydriftbymorethan10%duringthetransmissionoftheremainingbitsintheword.（Thisrequirementwassetinthedaysofmechanicalteleprintersandiseasilymetbymodernelectronicequipment.）

AftertheStartBit,theindividualbitsofthewordofdataaresent,withtheLeastSignificantBit（LSB）beingsentfirst.Eachbitinthetransmissionistransmitted

forexactlythesameamountoftimeasalloftheotherbits,andthereceiver“looks”atthewireatapproximatelyhalfwaythroughtheperiodassignedtoeachbittodetermineifthebitisa1ora0.Forexample,ifittakestwosecondstosendeachbit,thereceiverwillexaminethesignaltodetermineifitisa1ora0afteronesecondhaspassed,thenitwillwaittwosecondsandthenexaminethevalueofthenextbit,andsoon.

Thesenderdoesnotknowwhenthereceiverhas“looked”atthevalueofthebit.Thesenderonlyknowswhentheclocksaystobegintransmittingthenextbitoftheword.

Whentheentiredatawordhasbeensent,thetransmittermayaddaParityBitthatthetransmittergenerates.TheParityBitmaybeusedbythereceivertoperformsimpleerrorchecking.ThenatleastoneStopBitissentbythetransmitter.

Whenthereceiverhasreceivedallofthebitsinthedataword,itmaycheckfortheParityBits（bothsenderandreceivermustagreeonwhetheraParityBitistobeused）,andthenthereceiverlooksforaStopBit.IftheStopBitdoesnotappearwhenitissupposedto,theUARTconsiderstheentirewordtobegarbledandwillreportaFramingErrortothehostprocessorwhenthedatawordisread.TheusualcauseofaFramingErroristhatthesenderandreceiverclockswerenotrunningatthesamespeed,orthatthesignalwasinterrupted.

Regardlessofwhetherthedatawasreceivedcorrectlyornot,theUARTautomaticallydiscardstheStart,ParityandStopbits.Ifthesenderandreceiverareconfiguredidentically,thesebitsarenotpassedtothehost.Ifanotherwordisreadyfortransmission,theStartBitforthenewwordcanbesentassoonastheStopBitforthepreviouswordhasbeensent.Becauseasynchronousdatais“selfsynchronizing”,ifthereisnodatatotransmit,thetransmissionlinecanbeidle.Adatacommunicationpulsecanonlybeinoneoftwostatesbuttherearemanynamesforthetwostates.Whenon,circuitclosed,lowvoltage,currentflowing,oralogicalzero,thepulseissaidtobeinthe"

space"

condition.Whenoff,circuitopen,highvoltage,currentstopped,oralogicalone,thepulseissaidtobeinthe"

mark"

condition.Acharactercodebeginswiththedatacommunicationcircuitinthespacecondition.Ifthemarkconditionappears,alogicaloneisrecordedotherwisealogicalzero.

Figure1showsthisformat.

Thestartbitisalwaysa0（logiclow）,whichisalsocalledaspace.ThestartbitsignalsthereceivingDTEthatacharactercodeiscoming.Thenextfivetoeightbits,dependingonthecodesetemployed,representthecharacter.IntheASCIIcodesettheeighthdatabitmaybeaparitybit.Thenextoneortwobitsarealwaysinthe

mark（logichigh,i.e.,'

1'

）conditionandcalledthestopbit（s）.Theyprovidea"

rest"

intervalforthereceivingDTEsothatitmayprepareforthenextcharacterwhichmaybeafterthestopbit（s）.TherestintervalwasrequiredbymechanicalTeletypeswhichusedamotordrivencamshafttodecodeeachcharacter.Attheendofeachcharacterthemotorneededtimetostrikethecharacterbail（printthecharacter）andresetthecamshaft.

AlloperationsoftheUARThardwarearecontrolledbyaclocksignalwhichrunsatamultiple（say,16）ofthedatarate-eachdatabitisaslongas16clockpulses.Thereceiverteststhestateoftheincomingsignaloneachclockpulse,lookingforthebeginningofthestartbit.Iftheapparentstartbitlastsatleastone-halfofthebittime,itisvalidandsignalsthestartofanewcharacter.Ifnot,thespuriouspulseisignored.Afterwaitingafurtherbittime,thestateofthelineisagainsampledandtheresultinglevelclockedintoashiftregister.Aftertherequirednumberofbitperiodsforthecharacterlength（5to8bits,typically）haveelapsed,thecontentsoftheshiftregisterismadeavailable（inparallelfashion）tothereceivingsystem.TheUARTwillsetaflagindicatingnewdataisavailable,andmayalsogenerateaprocessorinterrupttorequestthatthehostprocessortransfersthereceiveddata.InsomecommontypesofUART,asmallfirst-in,first-out（FIFO）buffermemoryisinsertedbetweenthereceivershiftregisterandthehostsysteminterface.ThisallowsthehostprocessormoretimetohandleaninterruptfromtheUARTandpreventslossofreceiveddataathighrates.

Transmissionoperationissimplersinceitisunderthecontrolofthetransmittingsystem.Assoonasdataisdepositedintheshiftregister,theUARThardwaregeneratesastartbit,shiftstherequirednumberofdatabitsouttotheline,generatesandappendstheparitybit（ifused）,andappendsthestopbits.SincetransmissionofasinglecharactermaytakealongtimerelativetoCPUspeeds,theUARTwillmaintainaflagshowingbusystatussothatthehostsystemdoesnotdepositanewcharacterfortransmissionuntilthepreviousonehasbeencompleted;

thismayalsobedonewithaninterrupt.Sincefull-duplexoperationre