msp430头文件解释说明Word下载.docx
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//1
MSP430F149Ï
¶
ö
±
ê
¸
å
æ
#ifndef__msp430x14x
#define__msp430x14x
/************************************************************
*STANDARDBITS
************************************************************/
#defineBIT00x0001
#defineBIT10x0002
#defineBIT20x0004
#defineBIT30x0008
#defineBIT40x0010
#defineBIT50x0020
#defineBIT60x0040
#defineBIT70x0080
#defineBIT80x0100
#defineBIT90x0200
#defineBITA0x0400
#defineBITB0x0800
#defineBITC0x1000
#defineBITD0x2000
#defineBITE0x4000
#defineBITF0x8000
*STATUSREGISTERBITS
#defineC0x0001
#defineZ0x0002
#defineN0x0004
#defineV0x0100
#defineGIE0x0008
#defineCPUOFF0x0010
#defineOSCOFF0x0020
#defineSCG00x0040
#defineSCG10x0080
/*LowPowerModescodedwithBits4-7inSR*/
#ifndef__IAR_SYSTEMS_ICC/*Begin#definesforassembler*/
#defineLPM0CPUOFF
#defineLPM1SCG0+CPUOFF
#defineLPM2SCG1+CPUOFF
#defineLPM3SCG1+SCG0+CPUOFF
#defineLPM4SCG1+SCG0+OSCOFF+CPUOFF
/*End#definesforassembler*/
#else/*Begin#definesforC*/
#defineLPM0_bitsCPUOFF
#defineLPM1_bitsSCG0+CPUOFF
#defineLPM2_bitsSCG1+CPUOFF
#defineLPM3_bitsSCG1+SCG0+CPUOFF
#defineLPM4_bitsSCG1+SCG0+OSCOFF+CPUOFF
#include<
In430.h>
#defineLPM0_BIS_SR(LPM0_bits)/*EnterLowPowerMode0*/
#defineLPM0_EXIT_BIC_SR(LPM0_bits)/*ExitLowPowerMode0*/
#defineLPM1_BIS_SR(LPM1_bits)/*EnterLowPowerMode1*/
#defineLPM1_EXIT_BIC_SR(LPM1_bits)/*ExitLowPowerMode1*/
#defineLPM2_BIS_SR(LPM2_bits)/*EnterLowPowerMode2*/
#defineLPM2_EXIT_BIC_SR(LPM2_bits)/*ExitLowPowerMode2*/
#defineLPM3_BIS_SR(LPM3_bits)/*EnterLowPowerMode3*/
#defineLPM3_EXIT_BIC_SR(LPM3_bits)/*ExitLowPowerMode3*/
#defineLPM4_BIS_SR(LPM4_bits)/*EnterLowPowerMode4*/
#defineLPM4_EXIT_BIC_SR(LPM4_bits)/*ExitLowPowerMode4*/
#endif/*End#definesforC*/
*PERIPHERALFILEMAP
*Ì
Ø
¦
/*Ö
1*/
#defineIE1_0x0000
sfrbIE1=IE1_;
#defineWDTIE0x01/*¿
*/
#defineOFIE0x02/*Í
§
ñ
#defineNMIIE0x10/*·
*/
#defineACCVIE0x20/*¿
/flashÐ
#defineURXIE00x40/*´
0½
Ó
#defineUTXIE00x80/*´
0·
#defineIFG1_0x0002
sfrbIFG1=IFG1_;
#defineWDTIFG0x01/*¿
#defineOFIFG0x02/*Í
#defineNMIIFG0x10/*·
#defineURXIFG00x40/*´
#defineUTXIFG00x80/*´
/*Ö
1*/
#defineME1_0x0004
sfrbME1=ME1_;
#defineURXE00x40/*´
*/
#defineUSPIE00x40/*Í
#defineUTXE00x80/*´
2*/
#defineIE2_0x0001
sfrbIE2=IE2_;
#defineURXIE10x10/*´
1½
#defineUTXIE10x20/*´
1·
#defineIFG2_0x0003
sfrbIFG2=IFG2_;
#defineURXIFG10x10/*´
#defineUTXIFG10x20/*´
#defineME2_0x0005
sfrbME2=ME2_;
#defineURXE10x10/*´
#defineUSPIE10x10/*Í
#defineUTXE10x20/*´
*¿
¨
#defineWDTCTL_0x0120
sfrwWDTCTL=WDTCTL_;
#defineWDTIS00x0001/*Ñ
WDTCNTµ
ä
³
#defineWDTIS10x0002/*Ñ
#defineWDTSSEL0x0004/*Ñ
#defineWDTCNTCL0x0008/*Ç
ý
WDTCNT¶
:
Î
ª
1Ê
´
0¿
#defineWDTTMSEL0x0010/*Ñ
0:
¿
;
1:
¶
#defineWDTNMI0x0020/*Ñ
NMI/RSTÒ
RST;
NMI*/
#defineWDTNMIES0x0040/*WDTNMI=1Ê
.Ñ
Ñ
#defineWDTHOLD0x0080/*Í
ô
¯
1:
#defineWDTPW0x5A00/*Ð
ß
°
/*SMCLK=1MHz¶
#defineWDT_MDLY_32WDTPW+WDTTMSEL+WDTCNTCL/*TSMCLK*2POWER15=32ms¸
Ì
#defineWDT_MDLY_8WDTPW+WDTTMSEL+WDTCNTCL+WDTIS0/*TSMCLK*2POWER13=8.192ms"
#defineWDT_MDLY_0_5WDTPW+WDTTMSEL+WDTCNTCL+WDTIS1/*TSMCLK*2POWER9=0.512ms"
#defineWDT_MDLY_0_064WDTPW+WDTTMSEL+WDTCNTCL+WDTIS1+WDTIS0/*TSMCLK*2POWER6=0.512ms"
/*ACLK=32.768KHz¶
#defineWDT_ADLY_1000WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL/*TACLK*2POWER15=1000ms"
#defineWDT_ADLY_250WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS0/*TACLK*2POWER13=250ms"
#defineWDT_ADLY_16WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS1/*TACLK*2POWER9=16ms"
#defineWDT_ADLY_1_9WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0/*TACLK*2POWER6=1.9ms"
/*SMCLK=1MHz¿
#defineWDT_MRST_32WDTPW+WDTCNTCL/*TSMCLK*2POWER15=32ms¸
#defineWDT_MRST_8WDTPW+WDTCNTCL+WDTIS0/*TSMCLK*2POWER13=8.192ms"
#defineWDT_MRST_0_5WDTPW+WDTCNTCL+WDTIS1/*TSMCLK*2POWER9=0.512ms"
#defineWDT_MRST_0_064WDTPW+WDTCNTCL+WDTIS1+WDTIS0/*TSMCLK*2POWER6=0.512ms"
/*ACLK=32KHz¿
#defineWDT_ARST_1000WDTPW+WDTCNTCL+WDTSSEL/*TACLK*2POWER15=1000ms"
#defineWDT_ARST_250WDTPW+WDTCNTCL+WDTSSEL+WDTIS0/*TACLK*2POWER13=250ms"
#defineWDT_ARST_16WDTPW+WDTCNTCL+WDTSSEL+WDTIS1/*TACLK*2POWER9=16ms"
#defineWDT_ARST_1_9WDTPW+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0/*TACLK*2POWER6=1.9ms"
Ó
#defineMPY_0x0130/*Î
Þ
û
sfrwMPY=MPY_;
#defineMPYS_0x0132/*Ó
sfrwMPYS=MPYS_;
#defineMAC_0x0134/*Î
sfrwMAC=MAC_;
#defineMACS_0x0136/*Ó
sfrwMACS=MACS_;
#defineOP2_0x0138/*µ
sfrwOP2=OP2_;
#defineRESLO_0x013A/*µ
6Î
sfrwRESLO=RESLO_;
#defineRESHI_0x013C/*¸
sfrwRESHI=RESHI_;
#defineSUMEXT_0x013E/*½
©
constsfrwSUMEXT=SUMEXT_;
*DIGITALI/OPort1/2¼
#defineP1IN_0x0020/*P1Ê
constsfrbP1IN=P1IN_;
#defineP1OUT_0x0021/*P1Ê
sfrbP1OUT=P1OUT_;
#defineP1DIR_0x0022/*P1·
sfrbP1DIR=P1DIR_;
#defineP1IFG_0x0023/*P1Ö
sfrbP1IFG=P1IFG_;
#defineP1IES_0x0024/*P1Ö
sfrbP1IES=P1IES_;
#defineP1IE_0x0025/*P1Ö
sfrbP1IE=P1IE_;
#defineP1SEL_0x0026/*P1¹
sfrbP1SEL=P1SEL_;
#defineP2IN_0x0028/*P2Ê
constsfrbP2IN=P2IN_;
#defineP2OUT_0x0029/*P2Ê
sfrbP2OUT=P2OUT_;
#defineP2DIR_0x002A/*P2·
sfrbP2DIR=P2DIR_;
#defineP2IFG_0x002B/*P2Ö
sfrbP2IFG=P2IFG_;
#defineP2IES_0x002C/*P2Ö
sfrbP2IES=P2IES_;
#defineP2IE_0x002D/*P2Ö
sfrbP2IE=P2IE_;
#defineP2SEL_0x002E/*P2¹
sfrbP2SEL=P2SEL_;
*DIGITALI/OPort3/4¼
#defineP3IN_0x0018/*P3Ê
constsfrbP3IN=P3IN_;
#defineP3OUT_0x0019/*P3Ê
sfrbP3OUT=P3OUT_;
#defineP3DIR_0x001A/*P3·
sfrbP3DIR=P3DIR_;
#defineP3SEL_0x001B/*P3¹
sfrbP3SEL=P3SEL_;
#defineP4IN_0x001C/*P4Ê
constsfrbP4IN=P4IN_;
#defineP4OUT_0x001D/*P4Ê
sfrbP4OUT=P4OUT_;
#defineP4DIR_0x001E/*P4·
sfrbP4DIR=P4DIR_;
#defineP4SEL_0x001F/*P4¹
sfrbP4SEL=P4SEL_;
*DIGITALI/OPort5/6I/O¿
PORT5º
6Î
#defineP5IN_0x0030/*P5Ê
constsfrbP5IN=P5IN_;
#defineP5OUT_0x0031/*P5Ê
sfrbP5OUT=P5OUT_;
#defineP5DIR_0x0032/*P5·
sfrbP5DIR=P5DIR_;
#defineP5SEL_0x0033/*P5¹
sfrbP5SEL=P5SEL_;
#defineP6IN_0x0034/*P6Ê
constsfrbP6IN=P6IN_;
#defineP6OUT_0x0035/*P6Ê
sfrbP6OUT=P6OUT_;
#defineP6DIR_0x0036/*P6·
sfrbP6DIR=P6DIR_;
#defineP6SEL_0x0037/*P6¹
sfrbP6SEL=P6SEL_;
//2
*USART´
"
UCTL"
"
UTCTL"
URCTL"
1´
2¹
«
/*UCTL´
#definePENA0x80/*Ð
#definePEV0x40/*Å
0Ê
#defineSPB0x20/*Í
2Î
#defineCHAR0x10/*Ê
Ý
8Î
7Î
#defineLISTEN0x08/*×
(·
)*/
#defineSYNC0x04/*Í
0Ò
ì
#defineMM0x02/*Î
Ò
(Ò
)Ö
(Í
);
)´
#defineSWRST0x01/*¿
/*UTCTL´
#defineCKPH0x80/*Ê
(Ö
)Î
1