FIFO Verilog文档格式.docx

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FIFO Verilog文档格式.docx

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FIFO Verilog文档格式.docx

F_FirstN,

F_EmptyN

);

inputClk;

//CLKsignal.

inputRstN;

//LowAssertedResetsignal.

input[(`FWIDTH-1):

0]Data_In;

//DataintoFIFO.

inputFInN;

//WriteintoFIFOSignal.

inputFClrN;

//ClearsignaltoFIFO.

inputFOutN;

//ReadfromFIFOsignal.

output[(`FWIDTH-1):

0]F_Data;

//FIFOdataout.

outputF_FullN;

//FIFOfullindicatingsignal.

outputF_EmptyN;

//FIFOemptyindicatingsignal.

outputF_LastN;

//FIFOLastbutonesignal.

outputF_SLastN;

//FIFOSLastbutonesignal.

outputF_FirstN;

//Signalindicatingonlyone

//wordinFIFO.

regF_FullN;

regF_EmptyN;

regF_LastN;

regF_SLastN;

regF_FirstN;

reg[`FCWIDTH:

0]fcounter;

//counterindicatesnumofdatainFIFO

reg[(`FCWIDTH-1):

0]rd_ptr;

//Currentreadpointer.

0]wr_ptr;

//Currentwritepointer.

wire[(`FWIDTH-1):

0]FIFODataOut;

//DataoutfromFIFOMemBlk

0]FIFODataIn;

//DataintoFIFOMemBlk

wireReadN=FOutN;

wireWriteN=FInN;

assignF_Data=FIFODataOut;

assignFIFODataIn=Data_In;

FIFO_MEM_BLKmemblk(.clk(Clk),

.writeN(WriteN),

.rd_addr(rd_ptr),

.wr_addr(wr_ptr),

.data_in(FIFODataIn),

.data_out(FIFODataOut)

//ControlcircuitryforFIFO.Ifresetorclrsignalisasserted,

//allthecountersaresetto0.Ifwriteonlythewritecounter

//isincrementedelseifreadonlyreadcounterisincremented

//elseifboth,readandwritecountersareincremented.

//fcounterindicatesthenumofitemsintheFIFO.Writeonly

//incrementsthefcounter,readonlydecrementsthecounter,and

//read&

&

writedoesn'

tchangethecountervalue.

always@(posedgeClkornegedgeRstN)

begin

if(!

RstN)begin

fcounter<

=0;

rd_ptr<

wr_ptr<

end

elsebegin

FClrN)begin

WriteN&

F_FullN)

=wr_ptr+1;

ReadN&

F_EmptyN)

=rd_ptr+1;

ReadN&

=fcounter+1;

elseif(WriteN&

!

=fcounter-1;

//AlltheFIFOstatussignalsdependsonthevalueoffcounter.

//Ifthefcounterisequaltofdepth,indicatesFIFOisfull.

//Ifthefcounterisequaltozero,indicatestheFIFOisempty.

//F_EmptyNsignalindicatesFIFOEmptyStatus.Bydefaultitis

//asserted,indicatingtheFIFOisempty.AftertheFirstDatais

//putintotheFIFOthesignalisdeasserted.

RstN)

F_EmptyN<

=1'

b0;

if(FClrN==1'

b1)begin

if(F_EmptyN==1'

b0&

WriteN==1'

b0)

b1;

elseif(F_FirstN==1'

ReadN==1'

b1)

else

//F_FirstNsignalindicatesthatthereisonlyonedatumsitting

//intheFIFO.WhentheFIFOisemptyandawritetoFIFOoccurs,

//thissignalgetsasserted.

F_FirstN<

if((F_EmptyN==1'

b0)||

(fcounter==2&

b1))

elseif(F_FirstN==1'

(WriteN^ReadN))

//F_SLastNindicatesthatthereisspaceforonlytwodatawords

//intheFIFO.

F_SLastN<

if((F_LastN==1'

b1)||

(fcounter==(`FDEPTH-3)&

elseif(F_SLastN==1'

(ReadN^WriteN))

//F_LastNindicatesthatthereisonespaceforonlyonedata

//wordintheFIFO.

F_LastN<

if((F_FullN==1'

(fcounter==(`FDEPTH-2)&

elseif(F_LastN==1'

//F_FullNindicatesthattheFIFOisfull.

F_FullN<

if(F_LastN==1'

elseif(F_FullN==1'

endmodule

///////////////////////////////////////////////////////////////////

//

//Configurablememoryblockforfifo.Thewidthofthemem

//blockisconfigu

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