国际学术会议海报模板20-academic_conference_poster_model.ppt

国际学术会议海报模板20-academic_conference_poster_model.ppt

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Bestcase3D（Arch3/WI）performs12%betterthanbestcase2D（ReplicatedCachebanks）.Betterthermalprofile:

Bestcase（Arch3/WI）hasjust100Cincreasefrom2DwithmaximumperformancegainsUnderstandingtheImpactsof3DStackedLayoutsonILPVivekVenkatesan,ManuAwasthi,RajeevBalasubramonianSchoolofComputing,UniversityofUtahInterconnectswithinaprocessorpipelineareknowntobeamajorbottleneckforperformanceandpowerinfutureprocessors.WiredelaysareVertical3Dstackingofdiesallowsreductionofoverallwire-lengthsandhelpsalleviatetheperformanceandpoweroverheadofon-chipwiring.Theprimarydisadvantageisthatitresultsinincreasedpower-densitiesandon-chiptemperatures.Floor-planninggeneratesarbitrarylayoutsofmicro-architecturalblocksinaprocessorevaluatingeachwithrespecttoanobjectivefunctionIncludedelay-criticalityinformationintheobjectivefunctiontokeepheavilycommunicatingblockscloser3Dfloor-planninggenerates3Dlayouts,morepotentialtoexploitclosenessintheverticaldimensionWire-latenciespredictedtobein10sofcyclesinfuturefabricationtechnologiesStudyingtheimpactofwire-delaysonperformancereinforcestheneedforinterconnectoptimizationtechniquesPopularbelief:

Multi-threadinghideswire-delays,notentirelytrue!

Techniquetoalleviatekeywire-delays-Floor-planningBACKGROUNDIMPACTOFWIREDELAYSFLOOR-PLANNING3DTechnologyhasthepotentialtoimproveprocessorperformance,powerandcost3DwaferbondingtrapsheatresultinginhigherpeakandaveragetemperaturesTiled-architectureswithlonginter-clusterwiresstandtogainmorefrom3DstackingAggressivecoolingcapabilitiesmayberequiredtoextractthefullpotentialof3DOtherpromisingapplicationsof3Dtechnologyinclude“snap-on”analysisengines,fault-correctionenginesandstackedmemories.CONCLUSIONS3DTECHNOLOGY3DFolding3DFoldingProposedbyPuttaswamyet.Al.ProposedbyPuttaswamyet.Al.Drawback:

Drawback:

IncreasedThermalDensityIncreasedThermalDensityRegFileBreakandStackProposedSolution:

ProposedSolution:

3DStacking3DStackingArch1Arch1Arch2Arch2Arch3Arch3CacheBank（Replicated/WordInterleaved）CacheBank（Replicated/WordInterleaved）ClusterClusterObservationObservation:

Wire-DelayLimitedArchitecturesWire-DelayLimitedArchitecturesstandstandtobenefitmorefroma3Dintegrationtechnologytobenefitmorefroma3DintegrationtechnologyReducedWireDelaysandBetterThermalDensity!

3DBENEFITS2DPerformanceComparison2DPerformanceComparisonBestCase3DPerformanceBestCase3DPerformance