求是 程序doc.docx

1、求是 程序doc顶层library IEEE;use IEEE.STD_LOGIC_1164.ALL;use ieee.std_logic_unsigned.all;use ieee.std_logic_arith.all;entity Total_Program isport( CLK : in std_logic ;-100MHZ时钟信号 RESET : in std_logic ; -人体热释电 INFRARED_RECEIVE : in std_logic;-红外人体感应输出信号 INF_LED : out std_logic;-人体红外热释电感应到就灯亮 -按键控制 KEY_IN :

2、 in std_logic_vector(3 downto 0);-四个按键 -AD7991采样 LED3:out std_logic;-转换成功标志 SDA : inout std_logic; SCL : out std_logic; AD_CONVERSION_SPEED :out std_logic;-ad 采样速度，用于观察 -电机控制 PWM_OUT : out std_logic; -数码管显示 DOT: out std_logic;-小数点 LED7 :out std_logic_vector(6 downto 0);-gfedcba com Anode BIT8 :out s

3、td_logic_vector(0 to 7)-bit8(7) to the first smg );end Total_Program;architecture Behavioral of Total_Program is -按键子程序 component ManyKeys port( CLK : in std_logic; RESET : in std_logic; KEY_IN : in std_logic_vector(3 downto 0);-四个按键 KEY_OUT : out std_logic_vector(3 downto 0) -按键输出指示,对应key1key4 ); e

4、nd component ; -AD采样 component ack_check port( CLK : in std_logic; -100MHZ RESET : in std_logic; Sampling_fre: out std_logic;-AD7991每次转换标志 LED3:out std_logic;-转换成功标志 SDA : inout std_logic; SCL : out std_logic; AD_CONVERSION_SPEED :out std_logic; DATA_OUT: out std_logic_vector(11 downto 0) ); end com

5、ponent ; -电机控制程序 component Motor_Control port( CLK : in std_logic; RESET : in std_logic; KEY1,KEY2,KEY3,KEY4 : in std_logic ;-四个独立按键 SAMPLING_FLAG : in std_logic;-AD7991 每次采样标志 INFRARED_RECEIVE : in std_logic;-红外热释电接收信号 INF_LED : out std_logic;-人体红外热释电感应到就灯亮 SAMPLING_DATA : in std_logic_vector(11 do

6、wnto 0);-AD7991每次采样输出的12bits数据 SMG_DATA_SV : out std_logic_vector(11 downto 0);-给数码管显示的设定数据； SMG_DATA_PV : out std_logic_vector(11 downto 0);-给数码管显示的测量值 PWM_DUTY : out std_logic_vector(6 downto 0) -控制PWM的数值 ); end component ; -PWM控制 component PWM port( CLK : in std_logic; RESET : in std_logic; DUTY

7、: in std_logic_vector(6 downto 0);-从0100% PWM_OUT : out std_logic ); end component ; -数码管显示 component Smg_Display port( CLK :in std_logic;-100MHZ RESET : in std_logic; DATA_SV : in std_logic_vector(11 downto 0); DATA_PV : in std_logic_vector(11 downto 0); DOT: out std_logic; -MSB LSB LED7 :out std_l

8、ogic_vector(6 downto 0);-gfedcba com Anode BIT8 :out std_logic_vector(0 to 7)-bit8(7) to the first smg ); end component ;signal key_reg : std_logic_vector(3 downto 0);signal sampling_reg : std_logic;signal ad_reg : std_logic_vector(11 downto 0);signal duty_reg : std_logic_vector(6 downto 0);signal s

9、v_smg,pv_smg : std_logic_vector(11 downto 0);begin UA : ManyKeys port map ( CLK = CLK , RESET = RESET , KEY_IN = KEY_IN , KEY_OUT= key_reg ); UB : ack_check port map ( CLK = CLK , RESET = RESET , Sampling_fre=sampling_reg, LED3=LED3, SDA =SDA, SCL=SCL, AD_CONVERSION_SPEED = AD_CONVERSION_SPEED, DATA

10、_OUT= ad_reg ); UC : Motor_Control port map ( CLK = CLK , RESET = RESET , KEY1 =key_reg(3), KEY2 =key_reg(2), KEY3 =key_reg(1), KEY4 =key_reg(0), SAMPLING_FLAG =sampling_reg, INFRARED_RECEIVE = INFRARED_RECEIVE, INF_LED =INF_LED, SAMPLING_DATA = ad_reg, SMG_DATA_SV =sv_smg, SMG_DATA_PV =pv_smg, PWM_

11、DUTY = duty_reg ); UD : PWM port map ( CLK = CLK , RESET = RESET , DUTY =duty_reg, PWM_OUT= PWM_OUT ); UE : Smg_Display port map ( CLK = CLK , RESET = RESET , DATA_SV = sv_smg, DATA_PV = pv_smg, DOT =DOT , LED7 = LED7, BIT8 = BIT8 ); end Behavioral;2222222222 UA-ManyKeys 2222222222222222222222222222

12、2222222library IEEE;use IEEE.STD_LOGIC_1164.ALL;use ieee.std_logic_unsigned.all;use ieee.std_logic_arith.all;entity ManyKeys isport( CLK : in std_logic; RESET : in std_logic; KEY_IN : in std_logic_vector(3 downto 0);-四个按键 KEY_OUT : out std_logic_vector(3 downto 0) -按键输出指示,对应key1key4 );end ManyKeys;a

13、rchitecture Behavioral of ManyKeys iscomponent Independent_Keysport( CLK : in std_logic;-100MHZ RESET : in std_logic;-CPU RESET KEY : in std_logic;-输入按键 KOUT : out std_logic-按键输出指示 );end component ;begin G1 : for i in 0 to 3 generate ux : Independent_Keys port map ( CLK=CLK, RESET=RESET, KEY=KEY_IN(

14、i), KOUT= KEY_OUT(i) ); end generate; end Behavioral;3333333333333333333333333333 ux_indepent 3333333333333333333333333333-程序功能：单个按键按下并要求释放后才算一次按键，按下和释放都去抖了，一次按键按下并释放后-按键输出只持续10ms高电平-浙江求是科教设备有限公司-作者：行云流水-library IEEE;use IEEE.STD_LOGIC_1164.ALL;use ieee.std_logic_unsigned.all;use ieee.std_logic_arit

15、h.all;entity Independent_Keys isport( CLK : in std_logic;-100MHZ RESET : in std_logic;-CPU RESET KEY : in std_logic;-输入按键 KOUT : out std_logic-按键输出指示 );end Independent_Keys;architecture Behavioral of Independent_Keys issignal clk100hz : std_logic;type state is (s0,s1,s2,s3,s4,s5);signal current_stat

16、e : state;beginprocess(CLK,RESET)-产生10ms周期的时钟信号variable count:integer range 0 to 500000;begin if RESET=0 then count:=0;clk100hz=0; elsif rising_edge(CLK) then if count=500000-1 then count:=0;clk100hz=not clk100hz; else count:=count+1; end if; end if; end process;process(clk100hz,RESET)-按键消抖程序块begin

17、if RESET=0 then KOUT=0;current_state KOUT=0;-检测有键按下 if KEY=1 then current_state=s0; else current_state KOUT=0;-延时10ms if KEY=1 then current_state=s0; else current_state if KEY=1 then KOUT=0;current_state=s0;-再次检测有键按下否 else KOUT=1;current_state if KEY=0 then current_state=s3;-等待按键高电平出现 else current_s

18、tate current_state KOUT=0;-释放后结束 current_state current_state=s0; end case; end if; end process;end Behavioral;4444444444444444444 UB_ack_check 444444444444444444-程序介绍-该AD转换采用的是12bits的串行iic协议的AD7991，AD7991可以在三种模式下运行，分别是-标准模式，快速模式，高速模式，对应的时钟最高分别为100K，400K，和3.4MHZ。-此程序跑的是标准模式；SDA和SCL分别为AD7991的数据线和时钟线；-

19、程序使用说明-（1）AD_CONVERSION_SPEED为采样观察信号，实际采样频率f=AD_CONVERSION_SPEED；-通过改变第一个进程的count值可以改变采样频率；-（2）IIC地址选择：0101000，即AD7991-0的地址-（3）内部寄存器结构：-D7 D6 D5 D4 D3 D2 D1 D0-当D3=0时，选择的参考电压时内部电压，即3.3v，反之则选择外部参考电压；-D7D4为通道选择设置，该程序D7D4=0001，选择通道VIN0，即05v输入-其他位默认为零，选择1或0差不多；-AD采样值计算及信号观察-VIN=(DATA_OUT/4096)*5V,比如当VIN

20、0=3.3V时，DATA_OUT=101010001111;-备注：12AD最小分辨率：5/4096=1mv；library IEEE;use IEEE.STD_LOGIC_1164.ALL;use ieee.std_logic_unsigned.all;use ieee.std_logic_arith.all;entity ack_check isport( CLK : in std_logic; -100MHZ RESET : in std_logic; Sampling_fre: out std_logic;-AD7991每次转换标志 AD_CONVERSION_SPEED : out

21、std_logic;-ad采样信号，用于观察采集频率 LED3:out std_logic;-转换成功标志 SDA : inout std_logic; SCL : out std_logic; DATA_OUT: out std_logic_vector(11 downto 0) );end ack_check;architecture Behavioral of ack_check issignal clock: std_logic;signal data_reg: std_logic_vector(11 downto 0);type state is (start,transmit_sl

22、ave_address,check_ack1,transmit_reg,check_ack2,stop,read_start,read_slave_address, read_check_ack1,read_data_high,read_check_ack2,read_data_low,ack_bymaster );signal current_state : state:=start;beginDATA_OUT=500000 then count:=0; clock= not clock; else count:=count+1; end if; end if; end process;-A

23、D7991 IIC协议进程process(clock,RESET)variable count1:integer range 0 to 16;variable slave_address,internal_reg,read_address,data_high,data_low: std_logic_vector(8 downto 1);variable cnt: std_logic_vector(6 downto 0);variable cnt1:integer range 0 to 8;-variable cnt2 :integer range 0 to 16;begin if RESET=

24、0 then count1:=0; data_reg=000000000000; SDA=1; SCL=1; LED3=1; cnt1:=8;-1 byte length AD_CONVERSION_SPEED=0; slave_address:=01010000; -last bit 0 : write address model current_state count1:=count1+1;-启动信号 case count1 is when 1 = SDA SCL SDA SCL count1:=0;current_statenull; end case; when transmit_slave_address = count1:=count1+1;-写地址 case count1 is when 1 =SDASCLSCLcnt1:=cnt1-1;count1:=0; if cnt1=0 then cnt1:=8;current_state=check_ack1;