C6455EDMA3mcbsp.docx

1、C6455EDMA3mcbsp6455的EDMA3+MCBSP根据6455开发板自带的程序修改而来，调试通过，这个工程包括两个文件Edma_interrupt_example.c和edmaIntDispatcher.c，第一个是初始化的程序，第二个为中断服务子程序。最后再附带一个FPGA的Verilog程序，用与产生mcbsp的接收数据。如果想接收更多的数据，修改BUFFSIZE的大小就好了。希望对你有帮助！下面是第一个文件内容/*根据dsk_app.c这个文件修改的 mcbsp + edma，调试通过*/#include #include #include #include #include

2、 #include #include #define BUFFSIZE 10 #define PING 0#define PONG 1Int16 gBufferXmtPingBUFFSIZE; / Transmit PING bufferInt16 gBufferXmtPongBUFFSIZE; / Transmit PONG bufferInt16 gBufferRcvPingBUFFSIZE; / Receive PING bufferInt16 gBufferRcvPongBUFFSIZE; / Receive PONG buffervolatile Uint32 intFlag = 0

3、; Uint32 passStatus = 1; /* Forward declaration */void tcc1Fxn(void);void edmaInit(void); /* Macro that gives 2 CLK delay cycles */#define WAIT_FOR_2_CLK do volatile int delayCnt = 2; while(delayCnt 0) -delayCnt; while (0) /* Global constants- Number of words to transfer */#define NumOfWords 100/* F

4、unction declarations */void init_McBSP0(void);CSL_Status hwSetupVerify (CSL_McbspHwSetup *, CSL_McbspHwSetup * );/* Handle for the MCBSP instance */CSL_McbspHandle hMcbsp;/* Create data buffers for transfer */Uint16 xmtNumOfWords;/Uint16 rcvNumOfWords;/* Global data definition */CSL_McbspGlobalSetup

5、 mcbspGbl = CSL_MCBSP_IOMODE_TXDIS_RXDIS , CSL_MCBSP_DLBMODE_OFF, /关闭自环模式 CSL_MCBSP_CLKSTP_DISABLE;/* Receive data setup */CSL_McbspDataSetup mcbspRxData = CSL_MCBSP_PHASE_SINGLE, CSL_MCBSP_WORDLEN_8, 1, /frame length (CSL_McbspWordLen)0, 0, /CSL_MCBSP_FRMSYNC_IGNORE, /frame sinc ignore CSL_MCBSP_FR

6、MSYNC_DETECT, CSL_MCBSP_COMPAND_OFF_MSB_FIRST, CSL_MCBSP_DATADELAY_1_BIT, CSL_MCBSP_RJUSTDXENA_RJUST_RZF , CSL_MCBSP_INTMODE_ON_READY, / CSL_MCBSP_INTMODE_ON_FSYNC, CSL_MCBSP_32BIT_REVERS_DISABLE;/* Transmit data setup */CSL_McbspDataSetup mcbspTxData = CSL_MCBSP_PHASE_SINGLE, CSL_MCBSP_WORDLEN_8, 1

7、, /每次发送一个元素 (CSL_McbspWordLen)0, 0, CSL_MCBSP_FRMSYNC_DETECT, CSL_MCBSP_COMPAND_OFF_MSB_FIRST, CSL_MCBSP_DATADELAY_1_BIT, /发送时，相对于同步信号延时一个clk CSL_MCBSP_RJUSTDXENA_DXENA_OFF, CSL_MCBSP_INTMODE_ON_READY, / CSL_MCBSP_INTMODE_ON_FSYNC, CSL_MCBSP_32BIT_REVERS_ENABLE;/* Clock setup defaults */CSL_McbspClk

8、Setup mcbspClock = CSL_MCBSP_FSCLKMODE_INTERNAL, /* XMT Frame-sync */ /CSL_MCBSP_FSCLKMODE_INTERNAL, /* RCV Frame-sync */ CSL_MCBSP_FSCLKMODE_EXTERNAL, CSL_MCBSP_TXRXCLKMODE_INTERNAL, /* XMT clock */ / CSL_MCBSP_TXRXCLKMODE_INTERNAL, /* RCV clock */ CSL_MCBSP_TXRXCLKMODE_EXTERNAL, CSL_MCBSP_FSPOL_AC

9、TIVE_HIGH, /* XMT Frame-sync active high */ CSL_MCBSP_FSPOL_ACTIVE_HIGH, /* RCV Frame-sync active high */ CSL_MCBSP_CLKPOL_TX_RISING_EDGE, /* XMT clock rising edge */ /CSL_MCBSP_CLKPOL_RX_FALLING_EDGE,/* RCV clock falling edge */ CSL_MCBSP_CLKPOL_RX_RISING_EDGE,/* RCV clock falling edge */ 0, /* Fra

10、me-sync pulse width = 1 bit */ 0x8, /* Frame-sync pulse period 17clk*/ 0x5, /*clk divide by 6 */ CSL_MCBSP_SRGCLK_CLKCPU, CSL_MCBSP_CLKPOL_TX_RISING_EDGE ,/* CLKS pin signal rising edge */ CSL_MCBSP_TXFSMODE_DXRCOPY,/ CSL_MCBSP_TXFSMODE_SRG, CSL_MCBSP_CLKGSYNCMODE_OFF /* GSYNC = 0 means no clock syn

11、chronisation */;/* Multichannel setup */CSL_McbspMulChSetup mcbspMul = CSL_MCBSP_PARTMODE_2PARTITION, /* RX */ CSL_MCBSP_PARTMODE_2PARTITION, /* TX */ (Uint16)0, /* rxMulChSel */ (Uint16)0, /* txMulChSel */ CSL_MCBSP_PABLK_0,/* rxPartABlk */ CSL_MCBSP_PBBLK_1,/* rxPartBBlk */ CSL_MCBSP_PABLK_0,/* tx

12、PartABlk */ CSL_MCBSP_PBBLK_1 /* txPartABlk */;/* Mcbsp hwsetup */CSL_McbspHwSetup myHwSetup = &mcbspGbl, &mcbspRxData, &mcbspTxData, &mcbspClock, &mcbspMul, CSL_MCBSP_EMU_FREERUN, NULL;/* Intc declaration */CSL_IntcContext intcContext; CSL_IntcEventHandlerRecord EventHandler100;CSL_IntcObj intcObjE

13、dma;CSL_IntcHandle hIntcEdma; CSL_IntcGlobalEnableState state;CSL_IntcEventHandlerRecord EventRecord;CSL_IntcParam vectId; CSL_Edma3HwDmaChannelSetup dmahwSetupCSL_EDMA3_NUM_DMACH = CSL_EDMA3_DMACHANNELSETUP_DEFAULT;CSL_Edma3HwSetup hwSetup = &dmahwSetup0,NULL;/* Globals */* Edma handle */CSL_Edma3H

14、andle hModule; /* PaRAM settings for sets 13 (receive) and 65 (receive ping reload) */CSL_Edma3ParamSetup gParamSetupRcvPing = / PaRAM Set Structure for receive ping buffer CSL_EDMA3_OPT_MAKE / option - OPT (CSL_EDMA3_ITCCH_DIS, CSL_EDMA3_TCCH_DIS, CSL_EDMA3_ITCINT_DIS, CSL_EDMA3_TCINT_EN, 15, CSL_E

15、DMA3_TCC_NORMAL, CSL_EDMA3_FIFOWIDTH_NONE, CSL_EDMA3_STATIC_DIS, CSL_EDMA3_SYNC_A, CSL_EDMA3_ADDRMODE_INCR, CSL_EDMA3_ADDRMODE_INCR), (Uint32)0x028c0000, / srcAddr - SRC CSL_EDMA3_CNT_MAKE(2,BUFFSIZE), / aCntbCnt - (ACNT, BCNT) (Uint32)&gBufferRcvPing, / dstAddr - DST CSL_EDMA3_BIDX_MAKE(0,2), / src

16、DstBidx - (SRCBIDX, DSTBIDX) CSL_EDMA3_LINKBCNTRLD_MAKE(0x4800, 1), / linkBcntrld - (LINK, BCNTRLD) CSL_EDMA3_CIDX_MAKE(0,0), / srcDstCidx - (SRCCIDX, DSTCIDX) 1 / cCnt - CCNT;/* PaRAM settings for set 64 (transmit pong reload) */CSL_Edma3ParamSetup gParamSetupRcvPong = / PaRAM Set Structure for rec

17、eive pong buffer CSL_EDMA3_OPT_MAKE / option - OPT (CSL_EDMA3_ITCCH_DIS, CSL_EDMA3_TCCH_DIS, CSL_EDMA3_ITCINT_DIS, CSL_EDMA3_TCINT_EN, 15, CSL_EDMA3_TCC_NORMAL, CSL_EDMA3_FIFOWIDTH_NONE, CSL_EDMA3_STATIC_DIS, CSL_EDMA3_SYNC_A, CSL_EDMA3_ADDRMODE_INCR, CSL_EDMA3_ADDRMODE_INCR), (Uint32)0x028c0000, /

18、srcAddr - SRC CSL_EDMA3_CNT_MAKE(2,BUFFSIZE), / aCntbCnt - (ACNT, BCNT) (Uint32)&gBufferRcvPong, / dstAddr - DST CSL_EDMA3_BIDX_MAKE(0,2), / srcDstBidx - (SRCBIDX, DSTBIDX) CSL_EDMA3_LINKBCNTRLD_MAKE(0x4820, 1), / linkBcntrld - (LINK, BCNTRLD) CSL_EDMA3_CIDX_MAKE(0,0), / srcDstCidx - (SRCCIDX, DSTCI

19、DX) 1 / cCnt - CCNT;void edmaInit() CSL_Edma3Obj edmaObj; CSL_Edma3ParamHandle hParamBasic1; CSL_Edma3ChannelObj chObjXmt, chObjRcv; CSL_Edma3CmdIntr regionIntr; CSL_Edma3CmdDrae regionAccess; CSL_Edma3ChannelHandle hChannelXmt, hChannelRcv; CSL_Edma3Context context; CSL_Edma3ChannelAttr chAttrXmt,

20、chAttrRcv; CSL_Status status; Uint32 i; /* Intc module initialization */ intcContext.eventhandlerRecord = EventHandler; intcContext.numEvtEntries = 10; CSL_intcInit(&intcContext); /* Enable NMIs */ CSL_intcGlobalNmiEnable(); /* Enable global interrupts */ CSL_intcGlobalEnable(&state); /* Opening a i

21、ntc handle for edma event */ vectId = CSL_INTC_VECTID_4; hIntcEdma = CSL_intcOpen (&intcObjEdma, CSL_INTC_EVENTID_EDMA3CC_INT1, &vectId , NULL); /* Module initialization */ status = CSL_edma3Init(&context); if (status != CSL_SOK) printf (Edma module initialization failedn); return; /* Edma module op

22、en */ hModule = CSL_edma3Open(&edmaObj,CSL_EDMA3,NULL,&status); /* Setup the DRAE masks * DRAE enable(Bits 0-15) for the shadow region 1. */ regionAccess.region = CSL_EDMA3_REGION_1 ; regionAccess.drae = 0xFFFFFFFF ; regionAccess.draeh = 0xFFFFFFFF ; CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_DMAREGIO

23、N_ENABLE, ®ionAccess); /* DMA chanel - PaRAM mapping, queue assignment */ dmahwSetup12.paramNum = 12; dmahwSetup12.que = CSL_EDMA3_QUE_1; dmahwSetup13.paramNum = 13; dmahwSetup13.que = CSL_EDMA3_QUE_1; CSL_edma3HwSetup(hModule,&hwSetup); /* - Setup Receive Chan vnel (McBSP1 receive, param 13) - *

24、/ /* Channel open */ chAttrRcv.regionNum = CSL_EDMA3_REGION_1; chAttrRcv.chaNum = CSL_EDMA3_CHA_REVT0; hChannelRcv = CSL_edma3ChannelOpen(&chObjRcv, CSL_EDMA3, &chAttrRcv, &status); /* Set up parameter block 65 as EDMA transmit ping reload */ hParamBasic1 = CSL_edma3GetParamHandle(hChannelRcv,65,NUL

25、L); status = CSL_edma3ParamSetup(hParamBasic1,&gParamSetupRcvPing); /* Set up parameter block 64 as EDMA transmit pong reload */ hParamBasic1 = CSL_edma3GetParamHandle(hChannelRcv,64,NULL); CSL_edma3ParamSetup(hParamBasic1,&gParamSetupRcvPong); /* Set up parameter block 13 as EDMA transmit (start wi

26、th copy of ping) */ hParamBasic1 = CSL_edma3GetParamHandle(hChannelRcv,13,NULL); CSL_edma3ParamSetup(hParamBasic1,&gParamSetupRcvPing); /* Set up channel and queue relationships */ CSL_edma3HwChannelSetupParam(hChannelRcv, 13); CSL_edma3HwChannelSetupQue(hChannelRcv, CSL_EDMA3_QUE_1); /* Association

27、 of an EDMA event handler with the INTC routine */ EventRecord.handler = &eventEdmaHandler; EventRecord.arg = (void*)(hModule); CSL_intcPlugEventHandler(hIntcEdma,&EventRecord); /* Enabling event edma */ CSL_intcHwControl(hIntcEdma,CSL_INTC_CMD_EVTENABLE,NULL); /* Hook up the EDMA event with an comp

28、letion code function handler */ EdmaEventHook(15, tcc1Fxn); / EdmaEventHook(1, tcc1Fxn); /* Enable EDMA region interrupts */ regionIntr.region = CSL_EDMA3_REGION_1 ; regionIntr.intr = 0x0000C000; regionIntr.intrh = 0x00000000; CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTR_ENABLE,®ionIntr); /* Rec

29、eive event clear and enable ,备注用于外部触发使用*/ CSL_edma3HwChannelControl(hChannelRcv,CSL_EDMA3_CMD_CHANNEL_CLEAR,NULL); CSL_edma3HwChannelControl(hChannelRcv,CSL_EDMA3_CMD_CHANNEL_ENABLE,NULL); /* Clear CPU interrupt event 72 (EVTCLR2) */ /*(Uint32*)0x1800048) = 0x00000100; /* Enable CPU interrupt event

30、72 (EVTMASK2) */ *(Uint32*)0x1800088) = 0x00000100; /* Manually trigger the receive channel 备注，如果手动触发的话，就不要使能通道，即 CSL_edma3HwChannelControl(hChannelRcv,CSL_EDMA3_CMD_CHANNEL_ENABLE,NULL)这句话要注释掉;*/ /*for (i = 1; i = BUFFSIZE; i+) status = CSL_edma3HwChannelControl(hChannelRcv,CSL_EDMA3_CMD_CHANNEL_SET,NULL); if (status != CSL_SOK) printf (Edma channel set command failedn); return; */ while(1) /while (!intFlag); if (intFlag) intF