EDA课程设计与实现.docx

1、EDA课程设计与实现浦江学院课程设计报告（ 2010 2011 学年 第 一 学期）课程名称： EDA课程设计与实现 _班 级： 浦电子0804 学 号： P1402080419 姓 名： 杨昊 指导教师： 朱晓梅 2011 年 1 月课程设计题目：闹钟系统设计及实现目的与任务：1、巩固专业基础知识及EDA的相关知识；2、锻炼综合应用所学知识进行小型系统开发设计的能力；3、培养学生将理论应用于实践的能力；4、设计一个简单的闹钟系统。内容和要求：要求设计一个带闹钟功能的24小时计时器，计时器的外观如图1所示。图1 系统外观它包括以下几个组成部分： 显示屏：4个七段数码管显示当前时间(时：分)或设

2、置的闹钟时间；一个发光二极管以1HZ的频率跳动，用于显示秒； 按键key1，用于设置调时还是调分； 按键key2，用于输入新的时间或新的闹钟时间，每按下一次，时或分加1； TIME(时间)键，用于确定新的时间设置； ALARM(闹钟)键，用于确定新的闹钟时间设置，或显示已设置的闹钟时间； 扬声器，在当前时钟时间与闹钟时间相同时，发出蜂鸣声。设计内容（原理图以及相关说明、调试过程、结果）对设计的程序的总体描述，包括框图等填不满的话可以写写eda的发展史每个程序都要写上引脚的功能，从哪来到哪去，最好加上置顶文件LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE

3、 IEEE.STD_LOGIC_UNSIGNED.ALL;ENTITY ALARM_YH IS PORT (KEY1_YH: IN STD_LOGIC; KEY2_YH: IN STD_LOGIC; ALARM_BUTTON_YH: IN STD_LOGIC; TIME_BUTTON_YH: IN STD_LOGIC; CLK_YH: IN STD_LOGIC; CLK1_YH: OUT STD_LOGIC; CLR_YH: IN STD_LOGIC; DISPLAY0_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); DISPLAY1_YH: OUT STD_LOG

4、IC_VECTOR(3 DOWNTO 0); DISPLAY2_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); DISPLAY3_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); SOUND_ALARM1_YH: OUT STD_LOGIC);END ENTITY ALARM_YH ;ARCHITECTURE YH OF ALARM_YH IS COMPONENT KEY1_TRANS_YH IS PORT ( CLR_YH: IN STD_LOGIC; KEY1_YH: IN STD_LOGIC; Q_YH : BUFFER STD_LO

5、GIC_VECTOR(2 DOWNTO 0); END COMPONENT ; COMPONENT KEY2_TRANS_YH IS PORT ( CLR_YH: IN STD_LOGIC; KEY2_YH: IN STD_LOGIC; Q2_YH : BUFFER STD_LOGIC_VECTOR(3 DOWNTO 0);END COMPONENT; COMPONENT KEYBUFFER_YH IS PORT (KEY1_CTRL_YH: IN STD_LOGIC_VECTOR(2 DOWNTO 0); KEY2_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); C

6、LK_YH: IN STD_LOGIC; CLR_YH: IN STD_LOGIC; NEW_TIME0_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); NEW_TIME1_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); NEW_TIME2_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); NEW_TIME3_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); END COMPONENT ; COMPONENT CONTROLLER_YH IS PORT ( KEY1_YH : IN ST

7、D_LOGIC; ALARM_BUTTON_YH : IN STD_LOGIC; TIME_BUTTON_YH : IN STD_LOGIC; CLK_YH : IN STD_LOGIC; CLR_YH : IN STD_LOGIC; LOAD_NEWA_YH : OUT STD_LOGIC; LOAD_NEWC_YH : OUT STD_LOGIC; SHOW_NEW_TIME_YH : OUT STD_LOGIC; SHOWA_YH : OUT STD_LOGIC ); END COMPONENT ; COMPONENT ALARMREG_YH IS PORT(NEW_ALARM_TIME

8、0_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); NEW_ALARM_TIME1_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); NEW_ALARM_TIME2_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); NEW_ALARM_TIME3_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); LOAD_NEWA_YH: IN STD_LOGIC; CLK_YH: IN STD_LOGIC; CLR_YH: IN STD_LOGIC; ALARM_TIME0_YH: OUT STD_LOGIC_

9、VECTOR(3 DOWNTO 0); ALARM_TIME1_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); ALARM_TIME2_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); ALARM_TIME3_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); END COMPONENT ; COMPONENT COUNTER_YH IS PORT (NEW_CURRENT_TIME0_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); NEW_CURRENT_TIME1_YH: IN STD_

10、LOGIC_VECTOR(3 DOWNTO 0); NEW_CURRENT_TIME2_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); NEW_CURRENT_TIME3_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); LOAD_NEWC_YH: IN STD_LOGIC; CLK_YH: IN STD_LOGIC; CLR_YH: IN STD_LOGIC; CURRENT_TIME0_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); CURRENT_TIME1_YH: OUT STD_LOGIC_VECTOR(3

11、 DOWNTO 0); CURRENT_TIME2_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); CURRENT_TIME3_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); END COMPONENT ; COMPONENT DISPLAYDRIVER_YH IS PORT(ALARM_TIME0_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); ALARM_TIME1_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); ALARM_TIME2_YH: IN STD_LOGIC_VECTOR

12、(3 DOWNTO 0); ALARM_TIME3_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); CURRENT_TIME0_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); CURRENT_TIME1_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); CURRENT_TIME2_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); CURRENT_TIME3_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); NEW_TIME0_YH: IN STD_LOGIC_VECTOR

13、(3 DOWNTO 0); NEW_TIME1_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); NEW_TIME2_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); NEW_TIME3_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); SHOW_NEW_TIME_YH: IN STD_LOGIC; SHOWA_YH: IN STD_LOGIC; SOUND_ALARM_YH: OUT STD_LOGIC; DISPLAY0_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); DISPLAY1_YH

14、: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); DISPLAY2_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); DISPLAY3_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); END COMPONENT ; COMPONENT FQ_YH IS PORT (CLK_IN_YH: IN STD_LOGIC; CLR_YH: IN STD_LOGIC; CLK_OUT_YH: OUT STD_LOGIC); END COMPONENT ; COMPONENT YU IS PORT(ASOUNDIN :IN STD_

15、LOGIC; CLK:IN STD_LOGIC; ASOUNDOUT:OUT STD_LOGIC); END COMPONENT; COMPONENT FQ1_YH IS PORT (CLK_IN_YH: IN STD_LOGIC; CLR_YH: IN STD_LOGIC; CLK_OUT1_YH: OUT STD_LOGIC); END COMPONENT; SIGNAL S0: STD_LOGIC_VECTOR(2 DOWNTO 0); SIGNAL S1,S60,S61,S62,S63,S70,S71,S72,S73,S80,S81, S82,S83: STD_LOGIC_VECTOR

16、(3 DOWNTO 0); SIGNAL S2,S3,S4,S5,S9,S10: STD_LOGIC;BEGIN U1: KEY1_TRANS_YH PORT MAP(CLR_YH,KEY1_YH,S0); U2: KEY2_TRANS_YH PORT MAP(CLR_YH,KEY2_YH,S1); U3: KEYBUFFER_YH PORT MAP(S0,S1,CLK_YH,CLR_YH,S60,S61,S62,S63); U4:CONTROLLER_YH PORTMAP(KEY1_YH,ALARM_BUTTON_YH,TIME_BUTTON_YH,CLK_YH, CLR_YH,S9,S2,

17、S3,S4); U5: COUNTER_YH PORT MAP(S60,S61,S62,S63,S2,S5,CLR_YH,S80,S81,S82,S83); U6: ALARMREG_YH PORT MAP(S60,S61,S62,S63,S9,CLK_YH,CLR_YH,S70,S71,S72,S73); U7: DISPLAYDRIVER_YH PORT MAP(S70,S71,S72,S73,S80,S81,S82,S83, S60,S61,S62,S63,S3,S4,S10,DISPLAY0_YH, DISPLAY1_YH,DISPLAY2_YH,DISPLAY3_YH); U8: Y

18、U PORT MAP(S10,CLK_YH,SOUND_ALARM1_YH); U9: FQ_YH PORT MAP(CLK_YH ,CLR_YH,S5); U10: FQ1_YH PORT MAP(CLK_YH ,CLR_YH,CLK1_YH);END ARCHITECTURE YH;波形图分频器FQ1_YHLIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY FQ1_YH IS PORT (CLK_IN_YH: IN STD_LOGIC; CLR_YH: IN STD_LOGIC; CLK_OUT1_YH: OUT STD_LOGIC);END E

19、NTITY FQ1_YH ;ARCHITECTURE YH OF FQ1_YH IS BEGIN CLK1S: PROCESS(CLK_IN_YH, CLR_YH)IS SUBTYPE T_SHORT IS INTEGER RANGE 0 TO 65535; VARIABLE CNT1: T_SHORT; BEGIN IF (CLR_YH= 1)THEN CNT1:= 0; CLK_OUT1_YH = 0; ELSIF (RISING_EDGE(CLK_IN_YH)THEN IF (CNT1 128)THEN CLK_OUT1_YH = 1; CNT1:= CNT1+1; ELSIF (CNT

20、1 255)THEN CLK_OUT1_YH = 0; CNT1:= CNT1+1; ELSE CNT1:= 0; END IF; END IF; END PROCESS CLK1S;END ARCHITECTURE YH;波形图FQ_YHLIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY FQ_YH IS PORT (CLK_IN_YH: IN STD_LOGIC; CLR_YH: IN STD_LOGIC; CLK_OUT_YH: OUT STD_LOGIC);END ENTITY FQ_YH ;ARCHITECTURE YH OF FQ_YH

21、IS BEGIN CLK1F: PROCESS(CLK_IN_YH, CLR_YH)IS SUBTYPE T_SHORT IS INTEGER RANGE 0 TO 65535; VARIABLE CNT: T_SHORT; BEGIN IF (CLR_YH= 1)THEN CNT:= 0; CLK_OUT_YH = 0; ELSIF (RISING_EDGE(CLK_IN_YH)THEN IF (CNT 7680)THEN CLK_OUT_YH = 1; CNT:= CNT+1; ELSIF (CNT 15360)THEN CLK_OUT_YH = 0; CNT:= CNT+1; ELSE

22、CNT:= 0; END IF; END IF; END PROCESS CLK1F ;END ARCHITECTURE YH;原理波形图SpeakLIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL;ENTITY YU ISPORT(ASOUNDIN :IN STD_LOGIC; CLK:IN STD_LOGIC; ASOUNDOUT:OUT STD_LOGIC);END ENTITY YU;ARCHITECTURE HJC OF YU IS BEGIN ASOUNDOUT= ASOUNDIN AND

23、 CLK;END ARCHITECTURE;原理波形图显示文件LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL;ENTITY DISPLAYDRIVER_YH IS PORT(ALARM_TIME0_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); ALARM_TIME1_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); ALARM_TIME2_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); ALARM_TIME3_YH: I

24、N STD_LOGIC_VECTOR(3 DOWNTO 0); CURRENT_TIME0_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); CURRENT_TIME1_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); CURRENT_TIME2_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); CURRENT_TIME3_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); NEW_TIME0_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); NEW_TIME1_YH: IN

25、STD_LOGIC_VECTOR(3 DOWNTO 0); NEW_TIME2_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); NEW_TIME3_YH: IN STD_LOGIC_VECTOR(3 DOWNTO 0); SHOW_NEW_TIME_YH: IN STD_LOGIC; SHOWA_YH: IN STD_LOGIC; SOUND_ALARM_YH: OUT STD_LOGIC; DISPLAY0_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); DISPLAY1_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO

26、 0); DISPLAY2_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0); DISPLAY3_YH: OUT STD_LOGIC_VECTOR(3 DOWNTO 0);END ENTITY DISPLAYDRIVER_YH;ARCHITECTURE YH OF DISPLAYDRIVER_YH IS SIGNAL DISPLAY_TIME_0: STD_LOGIC_VECTOR(3 DOWNTO 0); SIGNAL DISPLAY_TIME_1: STD_LOGIC_VECTOR(3 DOWNTO 0); SIGNAL DISPLAY_TIME_2: STD_LO

27、GIC_VECTOR(3 DOWNTO 0); SIGNAL DISPLAY_TIME_3: STD_LOGIC_VECTOR(3 DOWNTO 0); BEGIN CTRL: PROCESS(ALARM_TIME0_YH,ALARM_TIME1_YH,ALARM_TIME2_YH,ALARM_TIME3_YH, CURRENT_TIME0_YH,CURRENT_TIME1_YH,CURRENT_TIME2_YH,CURRENT_TIME3_YH, NEW_TIME0_YH,NEW_TIME1_YH,NEW_TIME2_YH,NEW_TIME3_YH, SHOWA_YH, SHOW_NEW_T

28、IME_YH)IS BEGIN IF NOT (ALARM_TIME0_YH = CURRENT_TIME0_YH AND ALARM_TIME1_YH = CURRENT_TIME1_YH AND ALARM_TIME2_YH = CURRENT_TIME2_YH AND ALARM_TIME3_YH = CURRENT_TIME3_YH)THEN SOUND_ALARM_YH = 0; ELSE SOUND_ALARM_YH = 1; END IF; IF (SHOW_NEW_TIME_YH = 1)THEN DISPLAY_TIME_0 = NEW_TIME0_YH; DISPLAY_T

29、IME_1 = NEW_TIME1_YH; DISPLAY_TIME_2 = NEW_TIME2_YH; DISPLAY_TIME_3 = NEW_TIME3_YH; ELSIF (SHOWA_YH= 1)THEN DISPLAY_TIME_0 = ALARM_TIME0_YH; DISPLAY_TIME_1 = ALARM_TIME1_YH; DISPLAY_TIME_2 = ALARM_TIME2_YH; DISPLAY_TIME_3 = ALARM_TIME3_YH; ELSIF (SHOWA_YH = 0)THEN DISPLAY_TIME_0 = CURRENT_TIME0_YH;

30、DISPLAY_TIME_1 = CURRENT_TIME1_YH; DISPLAY_TIME_2 = CURRENT_TIME2_YH; DISPLAY_TIME_3 = CURRENT_TIME3_YH; ELSE ASSERT FALSE REPORT UNCERTAIN DISPLAY_DRIVER CONTROL! SEVERITY WARNING; END IF; END PROCESS CTRL; DISP: PROCESS(DISPLAY_TIME_0,DISPLAY_TIME_1,DISPLAY_TIME_2, DISPLAY_TIME_3)IS BEGIN DISPLAY0_YH = DISPLAY_TIME_0; DISPLAY1_YH = DISPLAY_TIME_1; DISPLAY2_YH = DISPLAY_TIME_2; DISPLAY3_YH = DISPLAY_TIME_3; END PROCESS DISP;END ARCHITECTURE;原理波形图闹铃部分LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;USE IEEE.STD_LOGIC_UNSIGNED.ALL