1、东华大学可编程asic课后实验报告答案赵曙光可编程ASIC技术实验报告学号:何足道姓名:何足道班级:自动化null老师:赵曙光实验一实验要求:用持续赋值语句描述一个4选1数据选择器。程序代码:module e(out,in0,in1,in2,in3,sel);output out;input in0,in1,in2,in3;input1:0 sel;reg out;assign sel=in0&in1&in2&in3;case(sel) 2b00: out=in0; 2b01: out=in1; 2b10: out=in2; 2b11: out=in3; default: out=2bx;en
2、dcaseendmodule实验结果:实验二实验要求:用行为语句设计一个8位计数器,每次在时钟的上升沿,计数器加1,当计数器溢出时,自动从零开始重新计数。另外,计数器有同步复位端。程序代码:module e(out,data,load,reset,clk);output7:0 out;input7:0 data;input load,clk,reset;reg7:0 out;always (posedge clk) /clk上升沿触发 begin if(!reset) out=8h00; /同步清0,低电平有效 else if(load) out=data; /同步预置 else out=ou
3、t+1; /计数 endendmodule实验结果:实验三实验要求:设计一个4位移位寄存器。程序代码:module e(out_data,in_data,clk,clr);output3:0 out_data;input3:0 in_data;input clk,clr;reg3:0 out_data;always (posedge clk or posedge clr) beginif(clr) out_data =0;endendmodule实验结果:实验四实验要求:设计一个n位加法器程序代码:module yt(cout,sum,a,b,cin);parameter y=9;output
4、y:0 sum;output cout;inputy:0 a,b;input cin;regy:0 sum;reg cout;always ( a or b or cin ) begin cout,sum=a+b+cin; endendmodule实验结果:实验五实验要求:设计一个4位减法器程序代码:module yt(d, q,clk, a,clear, load, up_down, qd);input3:0 d;input3:0 q;input clk,clear,load,up_down,a;output7:0 qd;reg7:0 cnt;assign qd=cnt;always (up
5、_down) beginif(!clear) cnt=8h00; /同步清0,低电平有效else if(load) cnt=d; /同步预置else if(up_down) cnt=d+q;/加法else if(a) cnt=d*q;/乘法else cnt=d-q; /减法 endendmodule实验结果:实验六实验要求:4位乘法器程序代码:module yt(d, q,clk, a,clear, load, up_down, qd);input3:0 d;input3:0 q;input clk,clear,load,up_down,a;output7:0 qd;reg7:0 cnt;as
6、sign qd=cnt;always (up_down) beginif(!clear) cnt=8h00; /同步清0,低电平有效else if(load) cnt=d; /同步预置else if(up_down) cnt=d+q;/加法else if(a) cnt=d*q;/乘法else cnt=d-q; /减法 endendmodule实验结果:实验七实验要求:设计实现一个功能类似74LS160的电路。程序代码:module ooo(out,data,load,reset,clk);output9:0 out;input9:0 data;input load,clk,reset;reg9
7、:0 out;always (posedge clk) begin if(!reset) out=8h00; else if(!(out-9) out=8h00; else if(load) out=data; else out=out+1; endendmodule实验结果:实验八实验要求:设计一个“1101”序列检测器。程序代码:module qwe(a,F,clk);input a,clk;output F;reg b,c,d,F;always (posedge clk)beginb=a;c=b;d=c;F=d&c&(!b)&a;endendmodule实验九实验要求:设计一个加法器,实
8、现sum=a0+a1+a2+a3,a0、a1、a2、a3宽度都是8位。如用下面两种方法实现,哪种方法更好一些。(1)sum=(a0+a1)+a2)+a3(2)sum=(a0+a1)+(a2+a3)程序代码:module yyy(cout,sum,ina,inb,inc,ind,cin,clk);output7:0 sum;output cout;input7:0 ina,inb,inc,ind;input cin,clk;reg7:0 tempa,tempb,tempd,tempe,sum;reg cout;reg tempc;always (posedge clk)begin tempa=i
9、na; tempb=inb; tempd=inc;tempe=ind; tempc=cin; endalways (posedge clk)begin cout,sum=tempa+tempb+tempc+tempd+tempe; endendmodule2module qwe(sum,sum2,sum3,cout,cout2,cout3,b,a,c,d,cin,clk);output7:0 sum,sum2,sum3;output cout,cout2,cout3;input7:0 a,b,c,d;input cin,clk;reg sum,sum2,sum3;always (posedge
10、 clk)sum=a+b+cin;always (posedge clk)sum2=c+d+cin;always (posedge clk)sum3=sum+sum2;endmodule实验结果:实验十实验要求:用流水线技术对上例中的sum=(a0+a1)+a2)+a3的实现方式进行优化,对比最高工作频率。程序代码:module yyy(cout,sum,ina,inb,inc,ind,cin,clk);output8:0 sum;output cout;input7:0 ina,inb,inc,ind;input cin,clk;reg7:0 tempa,tempb,tempc,tempd,
11、sum;reg tempci,firstco,secondco,thirdco, cout;reg1:0 firsts, thirda,thirdb, thirdc, thirdd;reg3:0 seconda, secondb, secondc, secondd, seconds;reg5:0 firsta, firstb,firstc,firstd, thirds;always (posedge clk)begin tempa=ina; tempb=inb; tempc=inc; tempd=ind;tempci=cin; end always (posedge clk)begin fir
12、stco,firsts=tempa1:0+tempb1:0+tempc1:0+tempd1:0+tempci; firsta=tempa7:2; firstb=tempb7:2; firstc=tempc7:2; firstd=tempd7:2; endalways (posedge clk)begin secondco,seconds=firsta1:0+firstb1:0+firstc1:0+firstd1:0+firstco,firsts; seconda=firsta5:2; secondb=firstb5:2; secondc=firstc5:2; secondd=firstd5:2
13、; endalways (posedge clk)begin thirdco,thirds=seconda1:0+secondb1:0+secondc1:0+secondd1:0+secondco,seconds;thirda=seconda3:2;thirdb=secondb3:2; thirdc=secondc3:2; thirdd=secondd3:2; endalways (posedge clk)begin cout,sum=thirda1:0+thirdb1:0+thirdc1:0+thirdd1:0+thirdco,thirds; endendmodule实验结果:实现流水线最高频率
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