单片机信号发生器中英文对照外文翻译文献.docx

1、单片机信号发生器中英文对照外文翻译文献中英文资料翻译Design of Digital Controlled Signal Generator Based on DDS and MCUKeywords: DDS; MCU; Signal generator; Phase Accumulator; DACAbstract. Its advantage to use DDS chip is output signal frequency bigger, and precision higher, Butusers cant change the output signal waveforms. T

2、he MCU can produce the required arbitrarywaveforms, but its program execution of the order limit the speed.So we use their Synergy to designthe digital controlled signal generator. The System has the advantage of output good qualitywaveform, frequency of precision and stability ,and high frequency,

3、empty, amplitude and phase is tostep into the need.IntroductionThe digitally synthesized sine waveform (Direct Digital Synthesis, DDS) is a well-known method andhas been applied to many embedded applications 1. This technique can be used to create a positivedigital sine waveform. Compared to other f

4、requency composing method, Direct Digital FrequencySynthesis(DDS) has been the most popular trend in modern frequency synthetic technique for itsexcellent characteristics. The signal source that the DDS technology realizes can carry out accuratecontrolling on DDS frequency , extent , phase exporting

5、 wave forms etc. by numerical control circuit,the system making use of this method has many merits such as stability, reliably and accuracy. The commercial DDS chip can only export a sine wave for the data in the ROM form already hasbeen solidified. If needing to come into being any wave form, it ma

6、y come true by the way that FPGAadopts DDS IP core or hardware describe language etc, however,the cost of This way cost is high; onthe other hand, any wave form can be achieved by making use of micro controller unit (MCU) to carryout figure frequency combining and DA converting. The experiment and a

7、pplying testing have shownthat the numerical control signal source composed of STM32 micro controller and DDS chip canwork well.DDS and wave form programming patternThe core of DDS system is phase accumulator carriage, and it is composed of a ADR and one unitphase register. When any clock comes, the

8、 phase register increases by with the step length, phaseregister output and phase control word add together, and then the output is imported to sine inquiryform address. The sine inquiring form includes the numeral extent information of one-period sine wave, eachaddress corresponds to the phase dot

9、of 0360 degrees of the sine wave. The mapping digital signaldrives DAC and outputs analog value. The output sine circle and frequency areThe phase register will return to the original state when the 2N/M fc clock is finished. Accordingly,the DDS system output a sine wave when the sine inquiring form

10、 finish a circle. The output sine circleand frequency is TO -output sine wave circle, unit: s; TC -external referenced clock circle, unit: s;M -accumulated step length of phase register, constant; f out -output sine wave frequency, unit: Hz; f c -external referenced clock frequency, unit: Hz; N -pha

11、se accumulator digit, constant.The relationship among the frequency control word, and the output signal frequency and thereferenced clock frequency are: Frequency control word is directly proportional to the output signal frequency. In order to describeclearly, the sine wave form is as one vector tu

12、rns around phase circle, the phase circle matches alongwith a cycle sine wave. Every sampling pots in wave form corresponds to a phase dot of the phasecircle. To synthesis the required frequency signal, it needs to accomplish the following steps1. Controlling every sampling increment of phase and ac

13、cumulating them (frequency control word K),output 2 pi cumulated phase (using phase accumulator).2. Converting 2 pi accumulating phase into the corresponding sine amplitude, use ROM to store thecorresponding phase-extent form of sine function in general.3. Use DAC to change extent code into the sign

14、al simulating voltage.4. The voltage signal that DAC exports is ladder wave form , the required simulation voltage out isachieved after LPF smoothing.Numerical control DDS signal source system designs analysisSystem uses the STM32 as control core and the AD9850 as generator. STM32 is 32-bit ARM-base

15、dmicro controller with 128 K byte flash memory. The two signal output of STM32 can be achieved by controlling AD9850 and DAC0832 outputsimultaneously. The system designs block diagram is shown in Fig. 1. One signal output can generate30 MHz sine wave and rectangular wave by controlling AD9850, the o

16、ther output generate any waveform with its frequency less than 10 KHz by numerical frequency mixture of DAC0832.Fig. 1 System designs block diagramHardware design AD9850 module AD9850 contains the DDS system and high-speed comparator. The AD9850 can realize the entirenumerical frequency combining. T

17、he core of the programmable DDS is the phase accumulator, it iscomposed of a ADR and a N bit phase register, N is for 24 32. After connecting to the accurate clock source and writing the frequency phase control word,AD9850 can generate the frequency-programmable and phase-programmable output of anal

18、og sinewave, which can be used as the direct frequency signal source or be transferred into rectangular wavethrough high-speed comparator. With the 125 MHz clock, 32-bit frequency control word can carry out the output frequencyresolution ratio of AD9850 with 0.0291 Hz4. DAC0832 module The circuit ex

19、ports the phase data sheet to DAC0832 from STM32 and gets corresponding waveform by DA converting. The step-by-step adjusting phase amounts can create arbitrary frequency, thePWM signal from the STM32 transfers into the corresponding voltage by low-pass filter, therefore,the referenced voltage of DA

20、C0832 is controlled, furthermore, the output wave form extent is tunedappropriately. The digital to analog conversion circuit is shown in Fig.2Fig. 2 DAC circuitPWM converting DA circuit The low-pass filtered PWM signal from STM32 is then stable using the voltage follower, whichwill yield a stable o

21、utput voltage; the voltage can be adjusted by tuning the PWM dutyfactor. Thesystem output three PWM signals, which controls AD9850 output extent, dutyfactor and the outputextent of DAC0832, respectively,. Fig. 3 shows the PWM controls DA transferring circuit.Fig. 3 PWM controlled DA converting circu

22、itFig. 4 Export amplification and the wave filtering circuit. (a) amplification circuit; (b) filteringcircuitAmplification and wave filtering circuitThe amplification circuit will export amplified wave form and modify the factor of amplification. Anexcellent smooth output waveform can be achieved by

23、 using the low-pass active power filtering. Theamplification circuit and the filtering circuit is showed in Fig. 4. Software design And the system software mainly include AD9850 driving module, DAC0832 driving module, thestep-by-step automation module, PWM-converting-DA module and uC/GUI figure supp

24、ortingsystem implanted in procedure. The operation interface is full of humanization for the multi-windowpattern is adopted. The design process of the system software is shown in Fig. 5. Implanted uC/GUI The numerical control signal source has used the uC/GUI software sufficiently to establish manyw

25、indows and control buttons. By means of invoking the corresponding windows and control with thefeedback information, the peripheral equipment operated under the control of the system. The external equipment is mainly separated into two drivers, the drive being an AD9850 moduleand DAC0832 module driv

26、e, respectively. The two modules can be controlled by means of the outsideinterruption and timing interruption. AD9850 Drive AD9850 has 40 control words, among them, 32-bit is used for frequency control, 5-bit is used for the phase control, 1-bit is used for the power source dormancy control, 2-bit

27、is used to chooseoperation pattern.Fig. 5 Systematic procedure flow chartThis 40 control words may arrive at AD9850 by concurrence way or serial way, in the concurrenceway, 8 data highway generals can transfer the data to a register. After repeating 5 times, the 40-bit data is loaded into the freque

28、ncy / phase data register (forrefreshing DDS output frequency and phase) at the FQ-UD rising edge, meanwhile, the addresspointer is reset to the first input registerThen the 8-bit data is loaded at the W-CLK rising edge, and the pointer is set to the next inputregister. After repeating 5 times of W-

29、CLK rising edge, the W-CLK rising edge will work no longeruntil the reset signal comes or the address pointer is reset to the first input register by the FQ-UDrising edge. The procedure operate AD9850 module through the bottom function, as void ad9850( double frequency, /frequency unsigned char phas

30、e, /phase unsigned char mode, /pattern unsigned char power /source ) The DAC0832 driven module In the design of the numerical control signal source, DAC0832 is defined as single bufferedpattern, when the 8 bit Parallel data D0D7 is input, the DA will transfer data in the CS. The bottom function of v

31、oid DA0832(u8 value)can invoke Out_To_DDS0832(doubleFrequency,u8 type) function and control the defined wave form and frequency. This function is based on figure frequency composes principle, it transfers the input frequency intocorresponding control word, and then combing phase step-by-step expect,

32、 output wave form datasheet in memory. The extent and dutyfactor can be tuned through invoking Adjust_Vpp() and Adjust Duty() Step-by-step automation procedure A step-by-step automation procedure brick is added to the design to define the frequency range,step-by-step rate , step-by-step amounts , ascending or lapse, cycling pattern. The step-by-step automation function can be realized through invoking Auto Step(AutoStepStr*AS) and passing memory structure type to a function.Test the experiment and data an