1、Chapter 13 PWMChapter 13Pulse-Width Modulator (S12PWM8B8CV1)中心对齐输出模式和4个可用的时钟源该PWM模块有8个独立控制中心和左对齐输出的通道。独立控制周期、占空比、计数器。The PWM definition is based on the HC12 PWM definitions. It contains the basic features from the HC11 with some of the enhancements incorporated on the HC12: center aligned output mod
2、e and four available clock sources.The PWM module has eight channels with independent control of left and center aligned outputs on each channel.Each of the eight channels has a programmable period and duty cycle as well as a dedicated counter. A flexible clock select scheme allows a total of four d
3、ifferent clock sources to be used with the counters. Each of the modulators can create independent continuous waveforms with software-selectable duty rates from 0% to 100%. The PWM outputs can be programmed as left aligned outputs or center aligned outputs.13.1.1 Features周期和占空比双缓冲在有效周期的末尾或通道被禁用,更改才会
4、有效(PWM计数器归零)8个8位或4个16位PWM通道Four clock sources (A, B, SA, and SB) provide for a wide range of frequencies4个时钟源(A,B,SA和SB )提供了广泛的频率紧急关闭The PWM block includes these distinctive features: Eight independent PWM channels with programmable period and duty cycle Dedicated counter for each PWM channel Progra
5、mmable PWM enable/disable for each channel Software selection of PWM duty pulse polarity for each channel Period and duty cycle are double buffered. Change takes effect when the end of the effective period is reached (PWM counter reaches zero) or when the channel is disabled. Programmable center or
6、left aligned outputs on individual channels Eight 8-bit channel or four 16-bit channel PWM resolution Four clock sources (A, B, SA, and SB) provide for a wide range of frequencies Programmable clock select logic Emergency shutdown13.1.2运行模式可编程禁止时钟进入分频器,以进入低功耗的等待模式。Freeze模式中有一个软件可编程选项禁止时钟输入分频器。这对仿真是有
7、益的There is a software programmable option for low power consumption in wait mode that disables the input clock to the prescaler.In freeze mode there is a software programmable option to disable the input clock to the prescaler. This is useful for emulation.13.2外部信号描述13.2 External Signal DescriptionT
8、he PWM module has a total of 8 external pins.该PWM模块共有8外部引脚。13.2.1 PWM7 PWM Channel 7This pin serves as waveform output of PWM channel 7 and PWM通道7作为输入的紧急关断功能13.2.1 PWM7 PWM Channel 7This pin serves as waveform output of PWM channel 7 and as an input for the emergency shutdown feature.13.2.2 PWM6 PWM
9、 Channel 6This pin serves as waveform output of PWM channel 6.13.2.3 PWM5 PWM Channel 5This pin serves as waveform output of PWM channel 5.13.2.4 PWM4 PWM Channel 4This pin serves as waveform output of PWM channel 4.13.2.5 PWM3 PWM Channel 3This pin serves as waveform output of PWM channel 3.13.2.6
10、PWM3 PWM Channel 2This pin serves as waveform output of PWM channel 2.13.2.7 PWM3 PWM Channel 1This pin serves as waveform output of PWM channel 1.13.2.8 PWM3 PWM Channel 0This pin serves as waveform output of PWM channel 0.寄存器中的保留位总是为013.3.2 Register Descriptions13.3.2.1 PWM Enable Register (PWME)E
11、ach PWM channel has an enable bit (PWMEx) to start its waveform output. When any of the PWMEx bits are set (PWMEx = 1), the associated PWM output is enabled immediately. However, the actual PWM waveform is not available on the associated PWM output until its clock source begins its next cycle due to
12、 the synchronization of PWMEx and the clock source.NOTEThe first PWM cycle after enabling the channel can be irregular. An exception to this is when channels are concatenated. Once concatenated mode is enabled (CONxx bits set in PWMCTL register), enabling/disabling the corresponding 16-bit PWM chann
13、el is controlled by the low order PWMEx bit.In this case, the high order bytes PWMEx bits have no effect and their corresponding PWM output lines are disabled. While in run mode, if all eight PWM channels are disabled (PWME70 = 0), the prescaler counter shuts off for power savings.1 = 通道 x 使能. 下一个时钟
14、开始输出PWM 0 = 通道x禁止当在16位模式时,使能控制由1;3;5;7位决定。在16位模式时0,2,4,6位将没有用。在运行过程中,如果8个通道被关掉,那么预分频记数器也将关掉,为了省电。PWME PWME_PWME0 -PWME_PWME7 If CON67=1, then bit has no effect and PWM output line 6 is disabled.If CON45 = 1, then bit has no effect and PWM output bit4 is disabledIf CON23 = 1, then bit has no effect a
15、nd PWM output bit2 is disabled.If CON01 = 1, then bit has no effect and PWM output line0 is disabled.PWME7:Pulse Width Channel 7 Enable0 Pulse width channel 7 is disabled.1 Pulse width channel 7 is enabled. The pulse modulated signal becomes available at PWM output bit 7 when its clock source begins
16、 its next cycle.PWME6:Pulse Width Channel 6 Enable0 Pulse width channel 6 is disabled.1 Pulse width channel 6 is enabled. The pulse modulated signal becomes available at PWM output bit6 when its clock source begins its next cycle. If CON67=1, then bit has no effect and PWM output line 6 is disabled.PWME5:
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