对ARM嵌入式系统速成样机平台设计中英文翻译.docx

1、对ARM嵌入式系统速成样机平台设计中英文翻译英文资料及中文翻译1英文资料The Design of a Rapid Prototype Platform for ARM Based Embedded SystemHardware prototype is a vital step in the embedded system design. In this paper, we discuss our design of a fast prototyping platform for ARM based embedded systems, providing a low-cost solutio

2、n to meet the request of flexibility and testability in embedded system prototype development. It also encourages concurrent development of different parts of system hardware as well as module reusing. Though the fast prototyping platform is designed for ARM based embedded system, our idea is genera

3、l and can be applied to embedded system of other types. I.INTRODUCTIONEmbedded systems are found everywhere, including in cellular telephones, pagers, VCRs, camcorders, thermostats, curbside rental-car check-in devices, automated supermarket stockers, computerized inventory control devices, digital

4、thermometers, telephone answering machines, printers, portable video games, TV set-top boxes - the list goes on. Demand for embedded system is large, and is growing rapidly. In order to deliver correct-the-first-time products with complex system requirements and time-to-market pressure, design verif

5、ication is vital in the embedded system design process. A possible choice for verification is to simulate the system being designed. If a high-level model for the system is used, simulation is fast but may not be accurate enough, with a low-level model too much time may be required to achieve the de

6、sired level of confidence in the quality of the evaluation. Since debugging of real systems has to take into account the behavior of the target system as well as its environment, runtime information is extremely important. Therefore, static analysis with simulation methods is too slow and not suffic

7、ient. And simulation cannot reveal deep issues in real physical system. A hardware prototype is a faithful representation of the final design, guarantying its real-time behavior. And it is also the basic tool to find deep bugs in the hardware. For these reasons, it has become a crucial step in the w

8、hole design flow. Traditionally, a prototype is designed similarly to the target system with all the connections fixed on the PCB (printed circuit boards).As embedded systems are getting more complex, the needs for thorough testing become increasingly important. Advances in surface-mount packaging a

9、nd multiple-layer PCB fabrication have resulted in smaller boards and more compact layout, making traditional test methods, e.g., external test probes and bed-of-nails test fixtures, harder to implement. As a result, acquiring signals on boards, which is beneficial to hardware testing and software d

10、evelopment, becomes infeasible, and tracking bugs in prototype becomes increasingly difficult. Thus the prototype design has to take account of testability. However, simply adding some test points is not enough. If errors on the prototype are detected, such as misconnections of signals, it could be

11、impossible to correct them on the multiple-layer PCB board with all the components mounted. All these would lead to another round of prototype fabrication, making development time extend and cost increase.Besides testability, it is important to maintain high flexibility during development of the pro

12、totype as design specification changes are common. Nowadays complex systems are often not built from scratch but are assembled by reusing previously designed modules or off-the-shelf components such as processors, memories or peripheral circuitry in order to cope with more aggressive time-to-market

13、constraints. Following the top-down design methodology, lots of effort in the design process is spent on decomposing the customers, requirements into proper functional modules and interfacing them to compose the target system.Some previous research works have suggested that FPLDs (field programmable

14、 logic device) could be added to the final design to provide flexibility as FPLDs can offer programmable interconnections among their pins and many more advantages. However, extra devices may increase production cost and power dissipation, weakening the market competition power of the target system.

15、 To address these problems, there are also suggestions that FPLDs could be used in hardware prototype as an intermediate approach 1-3, whereas this would still bring much additional work to the prototype design. Moreover, modules on the prototype cannot be reused directly. In industry, there have be

16、en companies that provide commercial solutions based on FPLDs for rapid prototyping 4. Their products are aimed at SOC (system on a chip) functional verification instead of embedded system design and development.In this paper, we discuss our design of a Rapid Prototyping Platform for ARM based Embed

17、ded System, providing a low cost solution to meet the request of flexibility and testability in embedded system prototype development. It also encourages concurrent development of different parts of system hardware as well as module reusing. The rest of the paper is organized as follows. In section

18、2, we discuss the details of our rapid prototyping platform. Section 3 shows the experimental results, followed by an overall conclusion in section 4.II. THE DESIGN OF A RAPID PROTOTYPING PLATFORMA. OverviewARM based embedded processors are wildly used in embedded systems due to their low-cost, low-

19、power consumption and high performance. An ARM based embedded processor is a highly integrated SOC including an ARM core with a variety of different system peripherals5. Many arm based embedded processors, e.g.6-8, adopt a similar architecture as the one shown in Fig. 1.The integrated memory control

20、ler provides an external memory bus interface supporting various memory chips and various operation modes (synchronous, asynchronous, burst modes). It is also possible to connect bus-extended peripheral chips to the memory bus. The on-chip peripherals may include interrupt controller, OS timer, UART

21、, I2C, PWM, AC97, and etc. Some of these peripherals signals are multiplexed with general-purpose digital I/O pins to provide flexibility to user while other on-chip peripherals, e.g. USB host/client, may have dedicated peripheral signal pins. By connecting or extending these pins, user may use thes

22、e onchip peripherals. When the on-chip peripherals cannot fulfill the requirement of the target system, extra peripheral chips have to be extended.The architecture of an ARM based embedded system is shown in Fig. 2. The whole system is composed of embedded processor, memory devices, and peripheral d

23、evices. To enable rapid prototyping, the platform should be capable of quickly assembling parts of the system into a whole through flexible interconnection. Our basic idea is to insert a reconfigurable interconnection module composed by FPLD into the system to provide adjustable connections between

24、signals, and to provide testability as well. To determine where to place this module, we first analyze the architecture of the system.The embedded system shown in Fig. 2 can be divided into two parts. One is the minimal system composed of the embedded processor and memory devices. The other is made

25、up of peripheral devices extended directly from on-chip peripheral interfaces of the embedded processor, and specific peripheral chips and circuits extended by the bus.The minimal system is the core of the embedded system, determining its processing capacity. The embedded processors are now routinel

26、y available at clock speeds of up to 400MHz, and will climb still further. The speed of the bus connecting the processor and the memory chips is exceeding 100MHz. As pin-to-pin propagation delay of a FPLD is in the magnitude of a few nanoseconds, inserting such a device will greatly impair the syste

27、m performance.The peripherals enable the embedded system to communicate and interactive with the circumstance in the real world. In general, peripheral circuits are highly modularized and independent to each other, and there are hardly needs for flexible connections between them.Here we apply a reco

28、nfigurable interconnection module to substitute the connections between microcomputer and the peripherals, which enables flexible adjusting of connections to facilitate interfacing extended peripheral circuits and modules. As the speed of the data communication between the peripherals and the proces

29、sor is much slower than that in the minimal system, the FPLD solution is feasible.Following this idea, we design the Rapid Prototyping Platform as shown in Fig. 3. We define the interface ICB between the platform and the embedded processor core boar that holds the minimal system of the target embedd

30、ed system. The interface IPB between the platform and peripheral boards that hold extended peripheral circuits and modules is also defined. These enable us to develop different parts of the target embedded system concurrently and to compose them into a prototype rapidly, and encourage module reusing

31、 as well. The two interfaces are connected by a reconfigurable interconnect module. There are also some commonly used peripheral modules, e.g. RS232 transceiver module, bus extended Ethernet module, AC97 codec, PCMCIA/CompactFlash Card slot, and etc, on the platform which can be interfaced through t

32、he reconfigurable interconnect module to expedite the embedded system development.B. Reconfigurable Interconnect ModuleWith the facility of state-of-arts FPLDs, we design a reconfigure interconnection module to interconnect, monitor and test the bus and I/O signals between the minimal system and per

33、ipherals.As the bus accessing obeys specific protocol and has control signals to identify the data direction, the interconnection of the bus can be easily realized by designing a corresponding bus transceiver into the FPLD, whereas the interconnection of the I/Os is more complex. As I/Os are multiplexed with on-chip peripherals si