1、二计处理器的结构和实现方法(指令格式)格式1:寄存器寻址方式15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 OP Rx Ry 空白格式2:立即数寻址方式 I格式3:无操作数寻址方式格式4:直接寻址方式 Addr模型机的指令系统操作码OP(1512)指令格式指令 操作00003IdlePC=PC+100012Load dataR0I PC=PC+100101Move Rx RyRx(Ry)PC=PC+10011Add Rx RyRx(Rx)+(Ry)PC=PC+10100AND Rx RyRx(Rx)AND(Ry)PC=PC+10101NAND Rx RyRx(Rx)
2、NAND(Ry)PC=PC+10110OR Rx RyRx(Rx)OR(Ry)PC=PC+10111XNOR Rx RyRx(Rx)XNOR(Ry)PC=PC+11000Shrp Rx RyRx(Ry)算术右移PC=PC+11001Shlp Rx RyRx(Ry)算术左移PC=PC+11010Swap Rx RyA(Ry);Ry(Rx);Rx(A);1011Jamp AdderPCAdder PC=PC+11100Jz AdderIf(R0)=0then PCAdderElse PC=PC+111014Read AddrR0(Addr)1110Write Addr(Addr)R0PC=PC +
3、11111Stop无操作,PC不变处理器的状态跳转操作过程:(一)、模型机每一状态下的操作及状态跳转当前状态执行操作次态与读下一条指令的有关的操作St_0取指令IR(15.0) M_data_in&00000000St_1Write-Read 0 PC=PC+1IF OP=Load THENR0 IR(11.8)|”000000000000”MAR PCIF(OP=Stop)THENELSE St_2END IFIF OP=Move THEN Rx (Ry)IF OP= Sra THEN Ry (Ry) 算术右移IF OP= Sla THEN Ry (Ry) 算术左移IF OP= Add TH
4、EN A (Ry)IF OP=And THEN A (Ry)IF OP=Nand THEN A (Ry)IF OP=Or THEN A (Ry)IF OP=Xnor THEN A (Ry)IF OP= Swap THEN A (Ry)IF OP=Stop THEN NULLIF OP=Idle THEN NULLIF OP=Jmp THEN NULLIF OP=Jz THEN NULLIF OP=Read THEN NULLIF OP=Write THEN NULLSt_2IF OP= Load OR OP=Move OR OP= Sra OR OP= Sla OR OP=Idle THEN
5、NULLWrite-Read 0IF OP= Add THEN Rx (Rx)+AIF OP= AND THEN Rx (Rx)ANDAIF OP=NAND THEN Rx (Rx) NANDAIF OP= OR THEN Rx (Rx) OR AIF OP= XNOR THEN Rx (Rx) XNORAIF OP= Swap THEN Ry (Rx)St_3IF OP= Skp THEN(PC IR(1.0) IF OP= Read THEN MAR IR(11.0)IF OP= Write THEN MAR IR(11.0) MDA R0IF OP= Swap THEN Rx (A)IF
6、 OP= Skp IF OP= Write St_4IF OP= Read IF OP= Read THENR0 M_data_inIF OP=Write THENSt_5MAR = PC;St_6If Read R0 := M_data_in;(二)、简单指令执行状态描述读内存指令:(1)St_0:取指令执行以下操作;1)M_address (MAR) 把指令地址送到地址总线2)令Write-Read 0 向内存发出读命令(取指令)3)IR(15.0) M_data_in(15.0) 将读出的指令加载于IR(15.0)4)PC=PC+1 至此指令已经全部取出,存在于IR(15.0),为取下一
7、条指令准备地址(2)St_1:NULL 直接跳转到下一状态(3)St_2:MAR IR(11.0)将数据地址加载于MAR(4)St_3:1)M_address (MAR)把数据地址送到地址总线2)令Write-Read 0 向内存发出读命令(取数据)3)MAR PC 把下一条指令地址加载于MAR(5)St_4:1)R0 M_data_in 将来自内存的数据加载于R0,本指令执行完毕2)M_address (MAR) 把下一条指令地址送到地址总线3)令Write-Read 0 向内存发出读命令(取下一条指令)4)下一状态跳转到St_0无条件转移指令4)PC=PC+1 (此语句无用,因为程序计数器
8、后续重新复制达到无条件转移目的)1)MAR IR(11.0) 将转移目标地址加载于MAR2)PC IR(11.0) 将转移目标地址加载于PC1) M_address (MAR) 把下一条指令地址送到地址总线2)令Write-Read 0 向内存发出读命令(取下一条指令)3)下一状态跳转到St_0三CPU的VHDL代码LIBRARY ieee;USE ieee.std_logic_1164.ALL;PACKAGE namespack IS CONSTANT idle : std_logic_vector(3 DOWNTO 0) :=0000; CONSTANT load :0001 CONSTA
9、NT move :0010 CONSTANT addP :0011 CONSTANT andp :0100 CONSTANT nandp :0101 CONSTANT orp :0110 CONSTANT xnorp :0111 CONSTANT shrp :1000 CONSTANT shlp :1001 CONSTANT swap :1010 CONSTANT jmp :1011 CONSTANT jz :1100 CONSTANT read :1101 CONSTANT write :1110 CONSTANT stop :1111END namespack;USE ieee.std_l
10、ogic_unsigned.ALL;USE WORK.namespack.ALL;-cpu实体声明-ENTITY cpu IS PORT( reset : IN std_logic; -清零信号低有效 clock : -时钟信号 Write_Read: OUT std_logic; -读写信号,1为写 M_address: OUT std_logic_vector(11 DOWNTO 0); -地址线 M_data_in: IN std_logic_vector(7 DOWNTO 0); -数据输入线 M_data_out: OUT std_logic_vector(7 DOWNTO 0);
11、-数据输出线 overflow: OUT std_logic); -溢出标志END cpu;-cpu寄存器传输级行为描述-ARCHITECTURE RTL OF cpu IS SIGNAL IR: std_logic_vector(15 DOWNTO 0); -指令寄存器 SIGNAL MDR: std_logic_vector(7 DOWNTO 0); -数据寄存器 SIGNAL MAR: std_logic_vector(11 DOWNTO 0); -地址寄存器 SIGNAL status: integer RANGE 0 TO 6; -状态寄存器BEGIN status_change:
12、PROCESS(reset, clock, status ) BEGIN IF reset = 0 THEN status status IF IR(15 DOWNTO 12)= Stop THEN ELSE= 2; END IF; WHEN 2 = CASE IR(15 DOWNTO 12) IS WHEN Swap|Jmp|Jz|Read|Write = status status IF IR(15 DOWNTO 12)= Swap THEN= 4; WHEN 4 = status WHEN Read|Write = 6; WHEN OTHERS = END CASE; ELSE NULL
13、; END IF; END PROCESS status_change; seq: PROCESS(reset,clock) VARIABLE PC:std_logic_vector(11 DOWNTO 0); -程序计数器 VARIABLE R0,R1,R2,R3: -通用寄存器 VARIABLE A: -临时寄存器 VARIABLE temp: std_logic_vector(8 DOWNTO 0); -临时变量 IF(reset=) THEN - 进入初始状态 IR ); PC : R0 : R1 : R2 : R3 : A : MAR MDR ELSIF(clockevent AND
14、 clock=) THEN overflow -状态0= M_data_in & 00000000 -取指令 PC := PC+1; -程序计数器加1 WHEN 1= -状态1 IF (IR(15 DOWNTO 12) /= Stop) THEN END IF; CASE IR(15 DOWNTO 12) IS WHEN Load = R0: & IR(11 DOWNTO 8); WHEN Move = -Move Rx,Ry; CASE IR(11 DOWNTO 8) IS WHEN =R1;=R2;=R3; R1:=R0; R2: WHEN R3: WHEN OTHERS= NULL; E
15、ND CASE; WHEN Shrp = -算术右移; CASE IR(11 DOWNTO 10) IS00000&R0(5 DOWNTO 1);01R1(5 DOWNTO 1);10R2(5 DOWNTO 1);R3(5 DOWNTO 1); WHEN Shlp = -算术左移;=R0(4 DOWNTO 0)&=R1(4 DOWNTO 0)&=R2(4 DOWNTO 0)&=R3(4 DOWNTO 0)& WHEN Addp|Andp|Nandp|Orp|Xnorp|Swap = CASE IR(9 DOWNTO 8) IS A: WHEN OTHERS = WHEN 2= -状态2 WHEN Addp = -Rx:= Rx+A; temp := (R0(7) & R0(7 DOWNTO 0) + NOT(A(7) & A(7 DOWNTO 0)+1; R0:=temp(7 DOWNTO 0); overflow - Rx:= Rx AND A;=R0 and A;=R1 and A;=R2 and A;=R3 and A; WHEN Nandp = Rx NAND A;=R0 nand A;
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