单片机交通灯中英文资料对照外文翻译文献Word文档格式.docx

1、About AT89C511.function characteristics description:AT89C51 is a low power consumption, high performance CMOS8 bit micro-controller, has the 8K in system programmable Flash memory. Use high-density Atmel company the beltpassword nonvolatile storage technology and manufacturing, and industrial 80S51

2、product instructions and pin fully compatible. Chip Flash allow program memory in system programmable, also suitable for conventional programmer. In a single chip, have dexterous 8 bits CPU and in system programmable Flash, make AT89C51 for many embedded control application system provides the high

3、flexible, super efficient solution. AT89C51 has the following standard function: 8k bytes Flash, 256 bytes RAM, 32-bit I/O mouth line, the watchdog timer, two data pointer, three 16 timer/counter, a 6 vector level 2 interrupt structure, full-duplex serial port, piece inside crystals timely clock cir

4、cuit. In addition, AT89C51 can drop to 0Hz static logic operation, support two software can choose power saving mode. Idle mode, the CPU to stop working, allowing the RAM, timer/counter, serial ports, interruption continue to work. Power lost protection mode, RAM content being saved, has been frozen

5、, microcontroller all work stop, until the next interruption or hardware reset so far. As shown in figure 1 for the AT89C51 pins allotment.Figure 1 the AT89C51 pins allotment2.interrupt introductionAT89C51 has six interrupt sources: two external interruption, （and）, three timer interrupt （timer 0, 1

6、, 2） and a serial interrupts. Each interrupt source can be passed buy bits or remove IE the relevant special register interrupt allow control bit respectively make effective or invalid interrupt source. IE also includes an interrupt allow total control bit EA, it can be a ban all interrupts. IE. Six

7、 is not available. For AT89C51, IE. 5 bits are also not be used. User software should not give these bits write 1. They AT89 series for new product reserved. Timer 2 can be TF2 and the T2CON registers EXF2 or logical triggered. Program into an interrupt service, the sign bit can be improved by hardw

8、are qing 0. In fact, the interrupt service routine must determine whether TF2 or EXF2 activation disruption, the sign bit must also by software qing 0. Timer 0 and 1 mark a timer TF0 and TF1 has been presented in the cycle count overflow S5P2 074 bits. Their value until the next cycle was circuit ca

9、pture down. However, the timer 2 marks a TF2 in count overflow of the cycle of S2P2 074 bits, in the same cycle was circuit capture down3.external clock driving characteristicssymbolsparametersminimumThe maximumunit1/TCLCLOscillatorFrequency24MHzTCLCLClock Period41.6nsTCHCXHigh Time15TCLCXLow TimeTC

10、LCHRise Time20TCHCLFall TimeTable 14.leisure and power lost pattern external pins statemodeProgram memoryALEpsenPort0Port1Port2Port3idleinternal1dataDataIdleExternalfloatPower downInternalTable 2 About 8255 chip1.8255 features:（1）A parallel input/output LSI chips, efficacy of I/O devices, but as CPU

11、 bus and peripheral interface.（2）It has 24 programmable Settings of I/O mouth, even three groups of 8 bits I/O mouth to mouth, PB mouth and PA PC mouth. They are divided into two groups 12 I/O mouth, A group including port A and C mouth （high four, PC4 PC7）, including group B and C port B mouth （low

12、 four, PC0 PC3）. A group can be set to give basic I/O mouth, flash control （STROBE） I/O flash controlled, two-way I/O3 modes, Group B can only set to basic I/O or flash controlled the I/O, and these two modes of operation mode entirely by controlling registers control word decision.2. 8255 pins effi

13、cacy: （1）. RESET: RESET input lines, when the input outside at high levels, all internal registers （including control registers） were removed, all I/O ports are denoting input methods. （2）. CS: chip choose a standard lamp line 1, when the input pins for low levels, namely/CS = 0, said chip is select

14、ed, allow 8255 and CPU for communications, / CS = 1, 8255 cannot with CPU do data transmission.（3）. RD: read a standard lamp line 1, when the input pins for low levels, namely/RD = 0 and/CS = 0, allow 8255 through the data bus to the CPU to send data or state information, namely the CPU 8255 read fr

15、om the information or data. （4）. The WR: write a standard lights, when the input pins for low levels, namely/WR = 0 and/CS = 0, allows the CPU will data or control word write 8255. （5）. D7: three states D0 two-way data bus, 8255 and CPU data transmission channel, when the CPU execution input/output

16、instruction, through its realization 8 bits of data read/write operation, control characters and status information transmitted through the data bus.（6）. PA0 PA7: port A input and output lines, A 8 bits of data output latches/buffers, an 8 bits of data input latches.（7）. PB0 PB7: port B input and ou

17、tput lines, a 8 bits of I/O latches, an 8 bits of input and output buffer. （8）. PC0 PC7: port C input and output lines, a 8 bits of data output latches/buffers, an 8 bits of data input buffer. Port C can through the way of working setting into two four ports, every 4 digit port contains A 4 digit la

18、tches, respectively with the port A and port B cooperate to use, can be used as control standard lights output or state standard lights input ports. （9）. A0, A1: address selection line, used to select the PA 8255 mouth, PB mouth, PC mouth and controlling registers. When A0=0, A1= 0, PA mouth be chos

19、en;When A0=0, A1 = 1, PB mouth be chosen;When A0=0, A1 = 1, PC mouth be chosen;When A0=1, A1= 1, control register is selected. Concerning seven section LED display introduction Through light emitting diode chip appropriate link （including series and parallel） and appropriate optical structure. May c

20、onstitute a luminous display light-emitting segments or shine points. By these luminous segments or shine point can be composed digital tube, symbols tube, m word pipe, tube, multilevel matrix display tube etc. Usually the digital tube, symbols tube, m word tube were called stroke display, but the s

21、troke displays and matrix tube collectively referred to as character displays. 1. The LED display classification （1） by word high marks: stroke monitors word high least 1mm （monolithic integrated type more digital tube word high in commonly 2 3mm）. Other types of stroke display tiptop 1.27 mm （0.5 i

22、nch） even up to hundreds of mm. （2） color-coded score red, orange, yellow, green and several kinds. （3） according to the structure points, reflecting cover type, a single point-elastic and monolithic integrated type. （4） from the luminous section electrode connection mode of points of anode and cathode two kinds. 2. LED display parameters Due to