基于FPGA多通道采样系统设计资料.docx

1、基于FPGA多通道采样系统设计资料 摘 要本论文介绍了基于FPGA的多通道采样系统的设计。用FPGA设计一个多通道采样控制器，利用VHDL语言设计有限状态机来实现对AD7892的控制。由于FPGA器件的特性是可以实现高速工作，为此模拟信号选用音频信号。由于音频信号的频率是20Hz-20KHz,这样就对AD转换的速率有很高的要求.因为FPGA的功能很强大，所以我们把系统的许多功能都集成到FPGA器件中，例如AD通道选择部分，串并输出控制模块，这样使得整个系统的外围电路简单、系统的稳定性强。FPGA的配置模式选用被动串行模式，这样就增强了系统的可扩展性。输出模式可选择性使得系统的应用相当广泛，串行

2、输出可以用于通信信号的采集，方便调制后发射到远程接受端，远程接收端对采集的数据进行解调；而并行输出模式则可以通过高速存储器将采集的信号放到微机或者其他的处理器上，根据采集的数据进行相应的控制。此系统的缺点是由于FPGA器件配置是基于SRAM查找表单元，编程的信息是保持在SRAM中，但SRAM在掉电后编程信息立即丢失，所以每次系统上电都需要重新配置芯片，这对在野外作业的工作人员很不方便，解决的方法是专用的配置器件来配置FPGA，在每次系统上电的时候会自动把编程信息配置到FPGA芯片中。但设计中没有采用到这种配置方案主要是考虑到专用配置器件的价格问题。本文开始介绍了多通道系统的组成部分，然后分别介

3、绍了各个组成部分的原理和设计方法,其中重点介绍了FPGA软件设计部分。还对当前十分流行的基于FPGA的设计技术作了简单的阐述，最后对系统的调试和应用作了简短的说明。关键词：音频放大；滤波器；FPGA；VHDL；AD7892；有限状态机；AbstractThe paper introduces the design of multiple channel sampling system based on FPGA, It designs a multiple channel control sampling instrument with FPGA, I use VHDL to design A

4、SM and then achieve the control to AD7892. Because the FPGA device can work in high-speed, we select audio signal for analog signals. The range of audio signal frequency is 20Hz-20 KHz, And then the transform speed of AD sampling must be very high. We integrate many modules in the FPGA device. For e

5、xample the AD sampling channel control, the mode of output which made the circuit simply and the system stably. We choose Passive Serial for configuring the FPGA device which made the system can extend easily. The mode of output can control which made this system can use many field. The serial outpu

6、t mode can use in the sampling of communication. The sampling data can launch to the long-distance sink by brewage, and then the long-distance sink can demodulation the sampling data. The parallel output mode can put the sampling data to the microprocessor or other processor by the high-speed memori

7、zer. And then control accordingly. The disadvantage of this system is that the configure of the FPGA device is based on SRAM LUT. The message of programming is kept in the SRAM, which will lose when the system is out of power supply. So we should reconfigure the programming message into the FPGA dev

8、ice when the system has the power supply again. It is not very convenience for working outside. But this can be resolve by using appropriative configure device which can load the configure message into the FPGA device automatically when the system have power supply. Because the price of the appropri

9、ative device, I dont choose this configure mode in this design.This paper introduce the multiple channel sampling system in the first place, and then introduce the principle of each module and design method separately, among these I introduce the designs of FPGA especially. I also introduce the desi

10、gning technique which is popular at present based on FPGA simply. Finally, I introduce debugging and application of this system.Key words: audio amplifying; filter; FPGA; VHDL; AD7892; ASM引言11 FPGA和VHDL概述1 FPGA发展历程1 VHDL语言介绍32 多通道采样系统的组成33 总体方案设计与论证43.1 方案设计43.1.1方案一43.1.2方案二43.1.3方案三43.2方案比较44 单元电路

11、的设计54.1音频放大、滤波部分54.1.1音频放大部分54.1.2有源滤波器的设计64.2 AD采样电路84.2.1芯片介绍84.2.2芯片应用114.3 FPGA控制部分114.3.1通道选择模块114.3.2 AD7892控制部分124.3.3延时模块的设计174.3.4串并输出选择控制184.3.5 FIFO模块184.3.6 AD采样系统顶层电路设计194.4 FPGA的硬件设计204.4.1 EP1K30TC144-3芯片介绍204.4.2芯片组成描述204.4.3芯片工作电压设计214.4.4芯片配置介绍224.4.5电路设计注意事项244.4.6硬件电路设计技巧255 软件介绍255.1 MAX+Plus