Design Entry CIS使用指南Word文件下载.docx

1、Design ResourcesOutputReferenced Projects1.4.1 设计资源 dsn SCHEMATIC Design Cache Library1.4.2 输出 Drc Bom NetList1.4.3 参考工程2. 原理图参数设置2.1图纸版面设置OptionsDesign templatePage Size2.1.1 页面单位 Inches Millimeters2.1.2 页面尺寸AA42.2 栅格设置OptionsDesign templateGrid Reference2.2.1 水平栅格设置22.2.2 竖直栅格设置2.3 字体设置OptionsDesi

2、gn templateFonts Alias Bookmark Border Text Hierarchical Net Name Off-Page Part Part Value Pin Name Pin Number Port Power Text Property Text Title Block2.4 颜色设置OptionsPreferenceColors/Print蓝色 2.5 标题栏设置OptionsDesign templateTitle Block2.6 自动备份设置OptionsAutobackup3. 原理图库管理3.1 直接新建元件3.1.1 创建新库FileNewLib

3、rarylibrary1.obllibrary1.oblNew Part Name Part Reference Prefix PCB Footprint Parts per Pkg Package TypeHomogenenousHeterogeneous Part NumberingAlphabeticNumericU1A，U1B，U1-1，U1-2OK3.1.2绘制元件外形PlaceRectangle 3.1.3 添加管脚 PlacePin NumberFilesave3.1.4 阵列式放置管脚Place pin array Starting Name Starting Number N

4、umber of Pins Increment Pin Spacing3.2 用电子表格新建元件FileNewLibraryLibrarylibrary1.obl library1.oblNew Part From spreadsheet。Part nameNo of SectionPart Ref PrefixPart Numberingsave3.3 修改元件Split Part3.4 添加原理图库LibraryAdd File3.5 删除原理图库LibraryDeleteCut3.6 capture库 AMPLIFIER.OLB ARITHMETIC.OLB ATOD.OLB BUS D

5、RIVERTRANSCEIVER.OLB CAPSYM.OLB CONNECTOR.OLB COUNTER.OLB DISCRETE.OLB DRAM.OLB ELECTRO MECHANICAL.OLB FIFO.OLB FILTRE.OLB FPGA.OLB GATE.OLB LATCH.OLB LINE DRIVER RECEIVER.OLB MECHANICAL.OLB MICROCONTROLLER.OLB MICRO PROCESSOR.OLB MISC.OLB MISC2.OLB MISCLINEAR.OLB MISCMEMORY.OLB MISCPOWER.OLB MUXDEC

6、ODER.OLB OPAMP.OLB PASSIVEFILTER.OLB PLD.OLB PROM.OLB REGULATOR.OLB SHIFTREGISTER.OLB SRAM.OLB TRANSISTOR.OLB4. 页面操作4.1 页面添加dsnSCHEMATIC1New PageRename4.2 页面编号Rename01TitleIndexTitle三页IndexTitleIndex4.3 页面删除DeleteCut5. 基本界面操作5.1 放大原理图ViewZoomIn5.2 缩小原理图ViewZoomOut6. 常用快捷键 I O F17. 添加元件7.1 添加原理图库Libr

7、aryAdd Libray7.2 工具栏图标 工具栏图标第一列 Place wire Place bus Place bus entry Place ground Place port Place off-page connector Place line Place rectangle Place arc 工具栏第二列 Place net aliax Place junction Place power Place hierarchical block Place no connect Place polyline Place ellipse Place text7.3 放置元器件Place

8、PartPLibrariesPart List7.4 元件的鼠标右键操作 Mirror Horizotally Mirror Vertically Rotate（ Edit Propertities（ Edit Part Copy Cut Delete8. 连线8.1 导线连接Placewire8.2 总线连接PlaceBusshit8.3 总线支线PlaceBus Entry8.4 未连接管脚处理PlaceNo Connect9. 添加信号名9.1 全局信号 电源Place poweCadence电路设计规范ValueOK 地Place groundCadence电路设计规范Value9.2

9、 添加网络名Place net aliaxValueOK9.3 添加端口Place portOK9.4 添加页连接符Place off-page connectorValueOKdsnU？Add Intersheet ReferencesX Offset5060PrefixSuffix10. 整体编辑器件Edit PropertiesPCB FootprintValue11. 添加文本Place textColor的下拉菜单，Font下的ChangeOK12. 创建层次式电路12.1 放置层次块PlaceHierarchical BlockReferenceImplementation Typ

10、eSchematic ViewImplementation nameOK12.2 添加层次端口PlaceHierarchical PINnameType13. 定义Room属性Edit propertiesROOM 14. 添加页属性New ColomnRowNamePageApplyEdit Edit propertiesPage115. 建立差分对ToolsCreat Differential PairDIff Pair NameCreat16. 原理图模块元件化dsnToolsGenerate PartPart nameOK17. 文件输出17.1 DRC输出dsnDesign rules check Outputs.drc17.2 BOM表输出dsnBill of materialsv Scope Process entire design Process slectionv Mode Use instances Use occurrencesv Line Item Definition Place each part entry on separate line Include FileOutputs.bom17.3 网络表输出dsnCreat netlistpsxnet.datpstxprt.datpstchip.datLAYOUT